Bryan L. Programmable controllers. Theory and implementation
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9-4 LADDER RELAY INSTRUCTIONS
Ladder relay instructions are the most basic instructions in the ladder
diagram instruction set. These instructions represent the ON/OFF status of
connected inputs and outputs. Ladder relay instructions use two types of
symbols: contacts and coils. Contacts represent the input conditions that
must be evaluated in a given rung to determine the control of the output. Coils
represent a rung’s outputs. Table 9-2 lists common ladder relay instructions.
In a program, each contact and coil has a referenced address number, which
identifies what is being evaluated and what is being controlled. The address
number references the I/O table location of the connected input/output or the
internal or storage bit output. A contact, regardless of whether it represents an
input/output connection or an internal output, can be used throughout the
control program whenever the condition it represents must be evaluated.
The format of the rung contacts in a PLC program depends on the desired
control logic. Contacts may be placed in whatever series, parallel, or series/
parallel configuration is required to control a given output. When logic
continuity exists in at least one left-to-right contact path, the rung condition
is TRUE; that is, the rung controls the given output. The rung condition is
FALSE if no path has continuity.
Table 9-2. Ladder relay instructions.
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Figure 9-17. (a) An examine-ON instruction with a logic 0 reference address and (b) an
examine-ON instruction with a logic 1 reference address.
The relay-type instructions covered in this section are the most basic pro-
grammable controller instructions. They provide the same capabilities as
hardwired relay logic, but with greater flexibility. These instructions provide
the ability to examine the ON/OFF status of specific bit addresses in memory
and control the state of internal and external outputs.
EXAMINE-ON/NORMALLY OPEN
An examine-ON instruction, referred to as a normally open (NO) contact
instruction, tests for an ON condition in a reference address. This reference
address can be an input table bit corresponding to an input device, an output
bit in the internal bit storage section of the data table, or an output table bit
corresponding to an output device (see Chapter 5 for I/O addressing).
During the execution of an examine-ON instruction in the control program,
the processor examines the reference address of the instruction for an ON
condition. If the reference address is logic 0 (OFF), the processor will not
change the state of the normally open contact; thus, it does not provide
continuity to the rung (see Figure 9-17a). However, if the reference address
is logic 1 (ON), the processor will close the normally open condition to
provide power flow in the rung (see Figure 9-17b).
L1 L2
LS
0210
0210
10
002
0 OFF
(no continuity)
1 ON
(continuity)
(a)
L1 L2
LS
0210
0210
10
102
(b)
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An examine-OFF instruction, also called a normally closed (NC) contact
instruction, tests for an OFF condition in the reference address. Like an
examine-ON instruction, the address can reference the input table, the output
table, or the internal bit storage section of the output table.
During the execution of an examine-OFF instruction, the processor examines
the reference address for an OFF condition. If the reference address has a logic
0 status (OFF), the instruction will continue to provide power (continuity)
through the normally closed contacts (see Figure 9-18a). If the reference
address has a logic 1 status (ON), the instruction will open the normally closed
contact, thus breaking continuity to the rung (see Figure 9-18b). An examine-
OFF instruction can be associated with a logic NOT function, so that if the
reference address is NOT ON, logic continuity will be provided.
Figure 9-18. (a) An examine-OFF instruction with a logic 0 reference address and (b) an
examine-OFF instruction with a logic 1 reference address.
OUTPUT COIL
An output coil instruction controls either a real output (connected to the PLC
via output interfaces) or an internal output (control relay). This instruction
uses an output coil address bit in the internal storage area as its reference
address. The
—( )—
symbol may also represent an output coil instruction.
EXAMINE-OFF/NORMALLY CLOSED
L1 L2
LS
0210
0210
10
002
0 OFF
(continuity)
(a)
L1 L2
LS
0210
0210
10
102
1 ON
(no continuity)
(b)
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During the execution of an output coil instruction, the processor evaluates all
the input conditions in the ladder rung. If no continuity exists, the processor
places a 0 in the output coil address bit, indicating an OFF condition to the
output coil instruction (see Figure 9-19a). However, if the processor detects
continuity in any path, the processor places a logic 1 in the output coil address
bit referenced by the instruction (see Figure 9-19b). This logic 1 status
indicates an ON condition to the output coil instruction. Therefore, if the
output coil address references an output bit in the output table, the processor
will turn ON the corresponding output. This will turn ON the field device
connected to the terminal referenced by the output coil address. Remember
that the processor turns ON the device only after it has completely solved
(scanned) the ladder program and updated the output at the end of the scan.
Figure 9-19. (a) An output coil instruction with a logic 0 reference address and (b) an
output coil instruction with a logic 1 reference address.
When an output coil is used as an internal output, its coil address maps an
internal bit storage address, rather than an output table bit that maps a real field
device. In this case, when the output coil is turned ON, the corresponding bit
in the internal bit storage area becomes logic 1. These internal outputs are used
when a program requires interlocking sequences or when a real output is not
necessary.
Normally open and normally closed reference contacts for an output coil
open and close according to the status of the output coil. Figure 9-20
illustrates an example of a simple ladder diagram with normally open and
10
003
0 OFF
(Output OFF)
(a)
(b)
L1 L2
PL03100310
10
103
1 ON
(Output ON)
L1 L2
PL03100310
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normally closed contacts driving an output rung. For output 20 to turn ON,
two things must happen: (1) PB1 must be pushed to turn ON reference input
10 and (2) limit switch LS1 must not be activated to keep reference input 11
OFF. In this case, the processor examines input 10 for an ON condition and
input 11 for an OFF condition; if both logic conditions are met, it energizes
output 20. With output 20 ON, the normally open contact 20 will close,
turning internal output 100 ON. Also, the normally closed contact 20 will
open because the test for an OFF condition at output 20 is not true (reference
20 is ON); therefore, it will turn internal output 101 OFF. At the EOS, the pilot
light (PL1) will be lit because the processor will send a 1 to the output module,
which will latch the logic 1 signal until continuity in the rung (output 20) is
disrupted. Note that outputs 100 and 101 do not control real output devices
because they reference internal bits that are not mapped to the I/O table.
10
11
PB1
L1 L2
LS1
L1 L2
PL1
20
10 11 20
20 100
20 101
Figure 9-20. Normally open and normally closed contacts driving real and internal
output coils.
NOT OUTPUT COIL
A NOT output coil instruction (recall the NOT logic function) is essentially
the opposite of an output coil instruction. If continuity is not present in the
rung, the instruction turns the referenced output bit ON. If continuity is
present, it turns the output OFF. Also, when a NOT output coil is ON, its
reference contacts change state (normally open contacts close, normally
closed ones open). If a NOT output coil is OFF, then the opposite occurs—
the normally open reference contacts stay open and the normally closed ones
remain closed. The
—(
/
)—
symbol represents the NOT output coil in some
programmable controllers.
A NOT output coil instruction can be tricky to implement. Therefore, it is
often easier to obtain a NOT output coil ladder rung by applying Boolean
logic rules to the logic expression of the output rung. An example of this rung
configuration follows.
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EXAMPLE 9-3
(a) Implement the equivalent ladder rung logic shown in Figure 9-21
using a NOT output coil instruction, and (b) implement the NOT
Y
logic
without using a NOT coil.
Figure 9-21. Ladder rung for Example 9-3.
SOLUTION
(a) The ladder logic expression representing output
Y
is:
Y
= (
A
+
C
) •
B
Using De Morgan’s Law (see Chapter 3), the NOT
Y
function can be
expressed as:
Y
= (
A
+
C
) •
B
= (
A
+
C
) +
B
= (
A
•
C
) +
B
Figure 9-22 shows the implementation of this logic using a NOT output
coil. Output
Y
will be ON if
A
and
B
are ON or if
C
and
B
are ON (note
that
A
,
B
, and
C
are examine-OFF instructions). Remember that the
NOT output is ON if continuity does not exist and OFF if continuity is
present. The circuit shown in Figure 9-22 is logically identical to the
one in Figure 9-21.
Figure 9-22. Implementation of Figure 9-21 using a NOT coil.
(b) The easiest way to implement a logic NOT function in the rung in
Figure 9-21 would be to use the same rung, except that the output
Y
AYB
C
AYC
B
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Figure 9-23. Implementation of the NOT
Y
logic without a NOT coil.
LATCH OUTPUT COIL
L
A latch coil instruction causes an output to remain energized even if the
status of the contacts that caused the output to energize changes. If any rung
path has logic continuity, this instruction turns the output ON and keeps it
ON, even if logic continuity or system power is lost. The latched output will
remain ON until it is unlatched by an unlatch output instruction. An unlatch
instruction is the only automatic (programmed) way to reset a latched output.
Although most PLCs allow latching of internal and external outputs, some
controllers will latch internal outputs only. A latch output coil instruction may
also be referred to as a set coil instruction, which can be unlatched by a reset
coil instruction.
UNLATCH OUTPUT COIL
U
An unlatch coil instruction resets a latched output with the same reference
address. When any rung path has logic continuity, this instruction turns OFF
the latched reference address coil, or rather unlatches it to an OFF condition.
Figure 9-24 illustrates the use of latch and unlatch coils.
would be a NOT coil. If we cannot use a NOT coil, then we can imple-
ment the NOT by adding another rung as shown in Figure 9-23. Here,
output
Z
is essentially the implementation of the NOT output
Y
coil.
10 100
L
11 100
U
Figure 9-24. Latch and unlatch coil instructions.
AYB
C
YZ
Y
= (
A
+
C
) •
B
Z
=
Y
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Latch and unlatch instructions may occur in block form as shown in Figure
9-25. The only difference between the ladder and block forms is that, in block
form, latching and unlatching are performed in the same instruction. If the
unlatch input is ON (continuity), the output coil will remain OFF. Note that
the latch and unlatch outputs in Figure 9-24 can have ladder logic rungs in
between them, while the ones shown in Figure 9-25 cannot. A latch/unlatch
block may also be called a set/reset block.
Figure 9-25. Latch/unlatch functional block instruction.
ONE-SHOT OUTPUT
A one-shot output instruction operates in a manner similar to an output coil
instruction—if the ladder rung has continuity, the one-shot output will be
energized (ON). However, the length of time that a one-shot output is ON is
one scan or less, depending on where it is located in the program.
One-shot outputs are used to reset conditions in one scan. Note that when
using a one-shot output to reset other output rungs or functional blocks, the
logic to be reset must be programmed after the one-shot rung is programmed.
Figure 9-26 illustrates a one-shot output and its timing diagram.
Figure 9-26. (a) A one-shot output instruction and (b) its timing diagram.
1Scan 23456789
A
Y
OS
Y
OS
Leading
Edge
Trailing
Edge
One
Scan
One
Scan
AY
OS
(a) (b)
Output
Latch Out
Unlatch
L/U Block
OS
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Depending on the controller used, a one-shot output may trigger a leading-
edge or a trailing-edge signal. A leading-edge trigger turns the one-shot
output ON for one scan after the OFF-to-ON transition of the input. A
trailing-edge trigger turns the output ON for one scan after the ON-to-OFF
transition of the input.
TRANSITIONAL CONTACT
A transitional contact instruction provides a one-shot pulse when its refer-
enced trigger signal makes either an OFF-to-ON (leading-edge) transition or
an ON-to-OFF (trailing-edge) transition. In a leading-edge transitional in-
struction, the contact will close for exactly one program scan whenever the
trigger signal goes from OFF to ON. The contact will allow logic continuity
for that one scan and then open again, even though the triggering signal may
stay ON. The triggering signal must turn OFF and ON again for the
transitional contact to reclose. Conversely, in a trailing-edge transitional
instruction, an OFF-to-ON transition of the trigger signal turns the contact
ON for one scan. The contact address (trigger) may be an external input/
output or an internal output.
Programmable controllers that do not provide one-shot output instructions
generally provide transitional contact instructions. Like a one-shot output,
a transitional contact is used to reset conditions in one scan, for example, to
reset a latched coil (i.e., unlatch it). Figure 9-27 shows circuit applications for
both leading-edge and trailing-edge transitional contacts, along with their
respective timing diagram.
Figure 9-27. Leading- and trailing-edge transitional contact instructions and their
timing diagrams.
Input A
A
Y
A
Z
Leading Edge
Trailing Edge
One
Scan
AY
AZ
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9-5 LADDER RELAY PROGRAMMING
LADDER SCAN EVALUATION
Scan evaluation is an important concept, since it defines the order in which
the processor executes a ladder diagram. The processor starts solving a ladder
program after it has read the status of all inputs and stored this information in
the input table. The solution starts at the top of the ladder program, beginning
with the first rung and proceeding one rung at a time. As the processor solves
the control program, it examines the reference address of each programmed
instruction, so that it can assess logic continuity for the rung being solved.
Even if the output conditions in the rung being solved affect previous rungs,
the processor will not return to the previous rung to resolve it.
To make this clearer, let’s examine the diagram in Figure 9-28, which
illustrates four simple rungs. The normally open contact 10, which we will
assume corresponds to a push button, activates the first rung. If contact 10
turns ON, it will turn output 100 ON. In the next rungs, contact 100 will turn
output 101 ON, contact 101 will turn output 102 ON, and contact 102 will
turn output 103 ON. Even though they are connected to different rungs, all of
these outputs turn ON in the same scan, because the processor updates the
real output devices connected to the modules when it finishes the program
scan. In this case, if outputs 100, 101, 102, and 103 were connected to pilot
lights, they would all turn ON at the same time.
Figure 9-29 illustrates the same ladder logic as in Figure 9-28 but with the
placement of rungs reversed. Assuming that input 10 is pushed in the first
scan, the processor must make four scans before it energizes output 103. The
logic the processor uses in the first scan is as follows: (1) When input 10 is
pushed, the processor examines reference 102 and finds it OFF (logic 0);
Figure 9-28. Ladder rung where all outputs turn ON in the same scan.
1Scan 234567
10
100
101
102
103
10 100
100 101
101 102
102 103