Severns Rudy. Design of snubbers for power circuits

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Figure 7

Usually C

test

is approximately equal to twice the switch capacitance

An alternate method for determining Lp in higher power circuits is to take advantage of the

voltage step (V

step

) which appears in V

or V

due to the dI/dt of the current flowing in Lp at turn-on:

At switch turn-on C

will be charged. This means that there will be a current spike in the switch due to

the discharge of C

through R

in addition to the normal current flow. This is a short transient pulse

which rapidly decays but it can add substantially to the turn-on current and should be taken into account.

It should be noted that the RCD snubber discussed in the next section will also have this turn-on current

spike but that spike can be controlled more easily because the value for R

does not have to be optimized

for maximum damping.

RC snubbers are very useful for low and medium power applications but when the power level is

more than a few hundred watts the loss in the snubber can be excessive and other types of snubbers need

to be considered. The RC snubber does have a place in high power applications as a secondary damping

network to suppress high frequency ringing which does not have a lot of energy associated with it.

RCD snubber design

The RCD snubber as shown in figure 8 has several advantages over the RC snubber:

· In addition to peak voltage limiting, the circuit can reduce the total circuit loss, including

both switching and snubber losses.

· Much better load lines can be achieved, allowing the load line to pass well within the SOA.

· For a given value of C

, the total losses will be less

· The shunt capacitance across the switch (Cp) is a useful part of the snubber

There is one disadvantage however. Because of the diode across R

, the effective value for R

during the charging of C

, is essentially zero. This is not the optimum value and, for a given C

, E

will

be higher than it would be in an optimized RC snubber.

Typical turn-off waveforms for this snubber are given in figure 9. These waveforms assume that

Lp = 0. The effect of Lp will be considered shortly. The key feature of these waveforms is that the switch

voltage rises slowly as the switch current falls. This means that the high peak power associated with

Figure 8

Figure 9

simultaneous maximum voltage and current is eliminated. The net result is much lower peak stress and

switching loss. Voltage waveforms for two different values of C

are shown. In this example I

= 10 A

and E

= 300 V. As C

is made larger the peak power and the switching loss will be lower. However,

larger C

means greater loss in R

when the switch turns on and C

is discharged through R

and the

switch. Again we see the tradeoff between snubber efficacy and loss.

Depending on the size of C

the switch voltage may reach E

before, at the same time, or after the

switch current reaches zero. The case where E = E

at the instant that I = 0 is defined as a “normal”

snubber and C

= C

[2]

, where :

Where t

is the fall time of the switch current (see figure 9). For the example given in figure 9, C

1.667 nF.

The relationships between C

, switching loss, peak switch stress, snubber loss and total loss are

shown in figure 10. Snubber size is shown relative to C

. When even a small snubber is used (C

< C

) the

switching loss drops quickly. As C

is made larger however, the improvement in switch loss decreases.

For example, for C

= C

, the switch loss is down to 16%. Making C

larger will reduce the switching

loss only a small amount but will increase the snubber loss substantially. There is in fact a broad mini-

mum loss around C

= 0.45 C

, where the total loss is reduced to 53% of what it would have been

without the snubber. It is important to remember that C

is part of C

and that the actual value for C

.45 C

- C

. For C

= 2 the total loss is equal to what it would have been if no snubber were used,

however the switching load line will have very low stress.

In those cases where the primary concern is to reduce the total switching loss, the value for C

is usually set to .5 Cn. In this case R

is selected to allow the voltage on C

to decay to a small value

during the minimum switch on time (t

on,min

). The capacitor voltage decay is a simple RC exponential

and in two time constants (τ = R

) will be down to 0.14 E

. This is usually sufficient. The value of

is then:

When L

is significant there will be voltage overshoot during turn-off. If E

must be controlled then

different values for C

may be necessary and a compromise made. Figure 11 gives a comparison be-

tween the RC snubber developed earlier and an RCD snubber using the same component values (R

51W and C

= 680 pF). Note that the loss will be lower but the peak voltage is higher for the RCD

snubber. This is typical. For similar total loss, C

can be larger in the RCD snubber which will reduce E

Increasing C

to 1.2 nF reduces E

to 424 V. C

could be increased further but for the same total loss, E

will still be higher in the RCD snubber.

Combined snubber: When it is important to minimize both the loss in the switch and E

Figure 10

Figure 11

a combination snubber, using both RC and RCD, can produce very good results with low losses. An

example of such a combination is given in figure 12 and the resulting waveform is compared to the

previous RC snubber, using the same circuit conditions, in figure 13.

Component selection and layout

The components in snubbers can be very highly stressed and must therefore be selected with

some care.

Layout and inductance

One of the primary reasons for using snubbers is the presence of parasitic inductances (L

) in the

circuit which generate voltage spikes and ringing when excited by the switching action. Larger parasitic

inductance means larger snubber components and more dissipation. Before actually designing the snub-

ber, it is important to minimize the circuit parasitic inductances and careful circuit layout is the key. As

power levels rise this becomes progressively more important because of the increasing dI/dt.

Figure 14A illustrates a typical inverter pole or converter half-bridge. The bus which connects

the source (V

) to the “+” and “-” ends of the pole will have some inherent inductance, both in the bus

structure and in the energy storage capacitors (C

, ESL). The effect of L

can be greatly reduced by

placing smaller, low ESL, capacitors as close as possible to the switches as shown by C

. One possibility

is to use CDE snubber capacitor modules which connect directly to the IGBT module as shown in figure

15. These modules are available as either a simple capacitor or they may include one or more snubber

diodes to implement an RCD snubber.

In some cases the addition of C

by itself may not be a complete answer because the bus voltage

may ring due to the resonance of Lp, C

and C

. An alternative is to use an RCD snubber as a clamp as

shown in figure 14B. The average voltage across C

will be equal to the bus voltage. At turn-off the

voltage across C

will rise as it limits the peak switch voltage but later in the cycle the voltage is reset to

the bus voltage through R

. R

also damps the bus voltage ringing. An additional advantage of this

approach is that L

acts as a turn-on snubber, reducing turn-on switching loss.

Because of the very large dI/dt’s which are common in snubbers, small amounts of parasitic

inductance within the snubber can interfere with snubber action leading to higher than expected peak

voltages. Parasitic inductance comes from two sources: intrinsic to the components due to physical size

and lead configuration and from the layout. Component inductance can be minimized by the choice of

package (radial versus axial for example) and can be further reduced by using several smaller devices in

parallel. Paralleling is particularly useful in high power snubbers because in addition to allowing lower

inductance configurations, it can improve the surface area-volume ratio allowing better cooling and

higher rms currents.

The primary source of layout inductance is the connection from the snubber components to the

switch. The snubber components should be placed as close as possible to the switch terminals. The

components should be arranged so that the current

Figure 12

Figure 13