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4–708

Motorola TMOS Power MOSFET Transistor Device Data



N–Channel Enhancement–Mode Silicon Gate

This advanced high voltage TMOS E–FET is designed to

withstand high energy in the avalanche mode and switch efficiently.

This new high energy device also offers a drain–to–source diode

with fast recovery time. Designed for high voltage, high speed

switching applications such as power supplies, PWM motor

controls and other inductive loads, the avalanche energy capability

is specified to eliminate the guesswork in designs where inductive

loads are switched and offer additional safety margin against

unexpected voltage transients.

• Avalanche Energy Capability Specified at Elevated

Temperature

• Low Stored Gate Charge for Efficient Switching

• Internal Source–to–Drain Diode Designed to Replace External

Zener Transient Suppressor — Absorbs High Energy in the

Avalanche Mode

• Source–to–Drain Diode Recovery Time Comparable to Discrete

Fast Recovery Diode

MAXIMUM RATINGS

= 25°C unless otherwise noted)

Rating Symbol Value Unit

Drain–Source Voltage V

DSS

500 Vdc

Drain–Gate Voltage (R

= 1.0 MΩ) V

DGR

500 Vdc

Gate–Source Voltage — Continuous

Gate–Source Voltage — Non–repetitive (t

≤ 50 µs)

GSM

±20

±40

Vdc

Vpk

Drain Current — Continuous

Drain Current — Pulsed

3.0

Adc

Total Power Dissipation @ T

= 25°C

Derate above 25°C

0.4

Watts

W/°C

Operating and Storage Temperature Range T

, T

stg

–65 to 150 °C

UNCLAMPED DRAIN–TO–SOURCE AVALANCHE CHARACTERISTICS (T

< 150°C)

Single Pulse Drain–to–Source Avalanche Energy — T

= 25°C

Single Pulse Drain–to–Source Avalanche Energy — T

= 100°C

Repetitive Pulse Drain–to–Source Avalanche Energy

DSR

(1)

DSR

(2)

210

5.0

THERMAL CHARACTERISTICS

Thermal Resistance — Junction to Case°

— Junction to Ambient°

θJC

θJA

2.5

62.5

°C/W

Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds T

260 °C

(1) V

= 50 V, I

= 3.0 A

(2) Pulse Width and frequency is limited by T

(max) and thermal response

Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit

curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.

Preferred devices are Motorola recommended choices for future use and best overall value.

REV 1

SEMICONDUCTOR TECHNICAL DATA

TMOS POWER FET

3.0 AMPERES

500 VOLTS

DS(on)

= 3.0 OHMS



CASE 221A–06, Style 5

TO–220AB

Motorola Preferred Device

4–709

Motorola TMOS Power MOSFET Transistor Device Data

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

Characteristic

Symbol Min Typ Max Unit

OFF CHARACTERISTICS

Drain–to–Source Breakdown Voltage

= 0, I

= 0.25 mA)

(BR)DSS

500 — — Vdc

Zero Gate Voltage Drain Current

= 500 V, V

= 0)

= 400 V, V

= 0, T

= 125°C)

DSS

—

0.25

1.0

mAdc

Gate–Body Leakage Current, Forward (V

GSF

= 20 Vdc, V

= 0) I

GSSF

— — 100 nAdc

Gate–Body Leakage Current, Reverse (V

GSR

= 20 Vdc, V

= 0) I

GSSR

— — 100 nAdc

ON CHARACTERISTICS*

Gate Threshold Voltage

= V

, I

= 0.25 mAdc)

= 125°C)

GS(th)

2.0

1.5

—

4.0

3.5

Vdc

Static Drain–Source On–Resistance (V

= 10 Vdc, I

= 1.5 Adc) R

DS(on)

— 2.4 3.0 Ohm

Drain–Source On–Voltage (V

= 10 Vdc)

= 3.0 A)

= 1.5 A, T

= 100°C)

DS(on)

—

8.0

Vdc

Forward Transconductance (V

= 15 Vdc, I

= 1.5 Adc) g

1.0 — — mhos

DYNAMIC CHARACTERISTICS

Input Capacitance

(V 25 V V 0

iss

— 435 — pF

Output Capacitance

= 25 V, V

= 0,

f = 1.0 MHz

)

oss

— 56 —

Transfer Capacitance

1.0

MHz)

rss

— 9.2 —

SWITCHING CHARACTERISTICS*

Turn–On Delay Time t

d(on)

— 14 — ns

Rise Time

= 250 V, I

≈ 3.0 A,

=18Ω R

=83Ω

— 14 —

Turn–Off Delay Time

Ω

(

)

= 10 V)

d(off)

— 30 —

Fall Time

GS(on)

— 20 —

Total Gate Charge

(V 400 V I 3 0 A

— 15 21 nC

Gate–Source Charge

= 400 V, I

= 3.0 A,

= 10 V

)

— 2.5 —

Gate–Drain Charge

— 10 —

SOURCE–DRAIN DIODE CHARACTERISTICS*

Forward On–Voltage (I

= 3.0 A) V

— — 1.5 Vdc

Forward Turn–On Time

= 3 0 A di/dt = 100 A/µs)

— ** —

Reverse Recovery Time

di/dt

100

A/µs)

— 200 —

INTERNAL PACKAGE INDUCTANCE

Internal Drain Inductance

(Measured from the contact screw on tab to center of die)

(Measured from the drain lead 0.25″ from package to center of die)

—

3.5

4.5

—

Internal Source Inductance

(Measured from the source lead 0.25″ from package to source bond pad)

— 7.5 —

*Indicates Pulse Test: Pulse Width = 300 µs Max, Duty Cycle ≤ 2.0%.

**Limited by circuit inductance.

4–710

Motorola TMOS Power MOSFET Transistor Device Data

TYPICAL ELECTRICAL CHARACTERISTICS

, DRAIN–TO–SOURCE VOLTAGE (VOLTS)

Figure 1. On–Region Characteristics

, JUNCTION TEMPERATURE (°C)

Figure 2. Gate–Threshold Voltage Variation

With Temperature

, GATE–TO–SOURCE VOLTAGE (VOLTS)

Figure 3. Transfer Characteristics

, JUNCTION TEMPERATURE (°C)

Figure 4. Breakdown Voltage Variation

With Temperature

, DRAIN CURRENT (AMPS)

Figure 5. On–Resistance versus Drain Current

, JUNCTION TEMPERATURE (°C)

Figure 6. On–Resistance versus Temperature

DS(on)

, DRAIN–TO–SOURCE RESISTANCE (OHMS)

DS(on)

, DRAIN–TO–SOURCE RESISTANCE

(NORMALIZED)

, DRAIN CURRENT (AMPS)

GS(th)

, GATE THRESHOLD VOLTAGE (NORMALIZED)

BR(DSS)

, DRAIN–TO–SOURCE BREAKDOWN VOLTAGE

(NORMALIZED)

201612840

1.2

1.1

0.9

0.8

–50 –25 0 25 50 75 100 125 150

86420

1.2

1.1

0.9

0.8

–50 0 50 100 150

543210

2.5

1.5

0.5

= 25°C

7 V

6 V

5 V

= V

= 0.25 mA

= –55°C

25°C

100°C

= 0

= 250 µA

= 100°C

25°C

–55°C

= 10 V

= 1.5 A

, DRAIN CURRENT (AMPS)

= 10 V

4 V

≥ 10 V

2 6 10 14 18

–50 –25 0 25 50 75 100 125 150

4–711

Motorola TMOS Power MOSFET Transistor Device Data

SAFE OPERATING AREA INFORMATION

, DRAIN CURRENT (AMPS)

, DRAIN–TO–SOURCE VOLTAGE (VOLTS)

Figure 7. Maximum Rated Forward Biased

Safe Operating Area

, DRAIN–TO–SOURCE VOLTAGE (VOLTS)

Figure 8. Maximum Rated Switching

Safe Operating Area

0 100 200 300 400

100

DS(on)

LIMIT

THERMAL LIMIT

PACKAGE LIMIT

= 20 V

SINGLE PULSE

= 25°C

0.1

1 µs

1 ms

10 ms

600

0.01

100 µs

≤ 150°C

1000

10 µs

500

FORWARD BIASED SAFE OPERATING AREA

The FBSOA curves define the maximum drain–to–source

voltage and drain current that a device can safely handle

when it is forward biased, or when it is on, or being turned on.

Because these curves include the limitations of simultaneous

high voltage and high current, up to the rating of the device,

they are especially useful to designers of linear systems. The

curves are based on a case temperature of 25°C and a maxi-

mum junction temperature of 150°C. Limitations for repetitive

pulses at various case temperatures can be determined by

using the thermal response curves. Motorola Application

Note, AN569, “Transient Thermal Resistance–General Data

and Its Use” provides detailed instructions.

SWITCHING SAFE OPERATING AREA

The switching safe operating area (SOA) of Figure 8 is the

boundary that the load line may traverse without incurring

damage to the MOSFET. The fundamental limits are the

peak current, I

and the breakdown voltage, V

(BR)DSS

. The

switching SOA shown in Figure 8 is applicable for both turn–

on and turn–off of the devices for switching times less than

one microsecond.

Figure 9. Resistive Switching Time Variation

versus Gate Resistance

(

)

, GATE RESISTANCE (OHMS)

= 250 V

= 3 A

= 10 V

= 25°C

d(off)

d(on)

10001

000

100

10 100

Figure 10. Thermal Response

r(t), EFFECTIVE TRANSIENT THERMAL

RESISTANCE (NORMALIZED)

θJC

(t) = r(t) R

θJC

= 2.5°C/W MAX

D CURVES APPLY FOR POWER

PULSE TRAIN SHOWN

READ TIME AT t

J(pk)

– T

= P

(pk)

θJC

(t)

(pk)

DUTY CYCLE, D = t

t, TIME (ms)

0.01

0.2

D = 0.5

0.05

0.01

SINGLE PULSE

0.1

0.01

0.02

0.03

0.02

0.05

0.1

0.2

0.3

0.5

0.02 0.05 0.1 0.2 0.5 1 2 5 10 20 50 100 200 500 1000

0.7

0.07

0.03 0.3 3 30 300

, DRAIN CURRENT (AMPS)

Figure 12. Commutating Safe Operating Area (CSOA)

0 100 200 300 400

, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

–

Figure 13. Commutating Safe Operating Area

Test Circuit

20 V

DUT

= 80% OF RATED V

dsL

= V

+ L

⋅ dl

/dt

–

di/dt ≤ 50 A/µs

500

600

Figure 14. Unclamped Inductive Switching

Test Circuit

Figure 15. Unclamped Inductive Switching

Waveforms

(BR)DSS

D(t)

4700 µF

250 V

50 Ω

ds(t)

t, (TIME)

DSR

(BR)DSS

–V

4–712

Motorola TMOS Power MOSFET Transistor Device Data

COMMUTATING SAFE OPERATING AREA (CSOA)

The Commutating Safe Operating Area (CSOA) of

Figure 12 defines the limits of safe operation for commutated

source-drain current versus re-applied drain voltage when

the source-drain diode has undergone forward bias. The

curve shows the limitations of I

and peak V

for a given

commutation speed. It is applicable when waveforms similar

to those of Figure 11 are present. Full or half-bridge PWM DC

motor controllers are common applications requiring CSOA

data.

The time interval t

frr

is the speed of the commutation cycle.

Device stresses increase with commutation speed, so t

frr

specified with a minimum value. Faster commutation speeds

require an appropriate derating of I

, peak V

or both. Ulti-

mately, t

frr

is limited primarily by device, package, and circuit

impedances. Maximum device stress occurs during t

as the

diode goes from conduction to reverse blocking.

DS(pk)

is the peak drain–to–source voltage that the device

must sustain during commutation; I

is the maximum for-

ward source-drain diode current just prior to the onset of

commutation.

is specified at 80% of V

(BR)DSS

to ensure that the

CSOA stress is maximized as I

decays from I

to zero.

should be minimized during commutation. T

has only

a second order effect on CSOA.

Stray inductances, L

in Motorola’s test circuit are assumed

to be practical minimums.

Figure 11. Commutating Waveforms

90%

/dt

10%

dsL

/dt

DS(pk)

MAX. CSOA

STRESS AREA

0.25 I

4–713

Motorola TMOS Power MOSFET Transistor Device Data

GATE–TO–SOURCE OR DRAIN–TO–SOURCE VOLTAGE (VOLTS)

Figure 16. Capacitance Variation

C, CAPAC

ANC

)

iss

000

800

600

400

252010010

Figure 17. Gate Charge versus

Gate–To–Source Voltage

, TOTAL GATE CHARGE (nC)

10 15 20 25

200

Figure 18. Gate Charge Test Circuit

15 V

100 k

47 k

2N3904

1 mA

+18 V V

10 V

100 k

0.1 µF

100

FERRITE

BEAD

DUT

SAME

DEVICE TYPE

AS DUT

= 15 V

; PULSE WIDTH ≤ 100 µs, DUTY CYCLE ≤ 10%

= 25°C

= 0

47 k

= 100 V

, GATE–TO–SOURCE VOLTAGE (VOLTS)

250 V

5515

= 0

= 25°C

= 3 A

400 V

oss

rss

4–714

Motorola TMOS Power MOSFET Transistor Device Data



N–Channel Enhancement–Mode Silicon Gate

This advanced high voltage TMOS E–FET is designed to

withstand high energy in the avalanche mode and switch efficiently.

This new high energy device also offers a drain–to–source diode

with fast recovery time. Designed for high voltage, high speed

switching applications such as power supplies, PWM motor

controls and other inductive loads, the avalanche energy capability

is specified to eliminate the guesswork in designs where inductive

loads are switched and offer additional safety margin against

unexpected voltage transients.

• Avalanche Energy Capability Specified at Elevated

Temperature

• Low Stored Gate Charge for Efficient Switching

• Internal Source–to–Drain Diode Designed to Replace External

Zener Transient Suppressor — Absorbs High Energy in the

Avalanche Mode

• Source–to–Drain Diode Recovery Time Comparable to Discrete

Fast Recovery Diode

MAXIMUM RATINGS

= 25°C unless otherwise noted)

Rating Symbol Value Unit

Drain–Source Voltage V

DSS

600 Vdc

Drain–Gate Voltage (R

= 1.0 MΩ) V

DGR

600 Vdc

Gate–Source Voltage — Continuous

Gate–Source Voltage — Non–repetitive

GSM

±20

±40

Vdc

Vpk

Drain Current — Continuous

Drain Current — Pulsed

3.0

Adc

Total Power Dissipation @ T

= 25°C

Derate above 25°C

0.6

Watts

W/°C

Operating and Storage Temperature Range T

, T

stg

–55 to 150 °C

UNCLAMPED DRAIN–TO–SOURCE AVALANCHE CHARACTERISTICS (T

< 150°C)

Single Pulse Drain–to–Source Avalanche Energy — T

= 25°C

Single Pulse Drain–to–Source Avalanche Energy — T

= 100°C

Repetitive Pulse Drain–to–Source Avalanche Energy

DSR(1)

DSR(2)

290

7.5

THERMAL CHARACTERISTICS

Thermal Resistance — Junction to Case°

Thermal Resistance — Junction to Ambient°

θJC

θJA

1.67

62.5

°C/W

Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds T

260 °C

(1) V

= 50 V, I

= 3.0 A

(2) Pulse Width and frequency is limited by T

(max) and thermal response

Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit

curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.

Preferred devices are Motorola recommended choices for future use and best overall value.

REV 1

SEMICONDUCTOR TECHNICAL DATA

TMOS POWER FET

3.0 AMPERES

600 VOLTS

DS(on)

= 2.2 OHMS



CASE 221A–06, Style 5

TO-220AB

Motorola Preferred Device

4–715

Motorola TMOS Power MOSFET Transistor Device Data

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

Characteristic

Symbol Min Typ Max Unit

OFF CHARACTERISTICS

Drain–to–Source Breakdown Voltage

= 0, I

= 250 µAdc)

(BR)DSS

600 — — Vdc

Zero Gate Voltage Drain Current

= 600 V, V

= 0)

= 480 V, V

= 0, T

= 125°C)

DSS

—

0.25

1.0

mAdc

Gate–Body Leakage Current — Forward (V

GSF

= 20 Vdc, V

= 0) I

GSSF

— — 100 nAdc

Gate–Body Leakage Current — Reverse (V

GSR

= 20 Vdc, V

= 0) I

GSSR

— — 100 nAdc

ON CHARACTERISTICS*

Gate Threshold Voltage

= V

, I

= 250 µAdc)

= 125°C)

GS(th)

2.0

1.5

—

4.0

3.5

Vdc

Static Drain–to–Source On–Resistance (V

= 10 Vdc, I

= 1.5 A) R

DS(on)

— 2.1 2.2 Ohms

Drain–to–Source On–Voltage (V

= 10 Vdc)

= 3.0 A)

= 1.5 A, T

= 100°C)

DS(on)

—

9.0

7.5

Vdc

Forward Transconductance (V

= 15 Vdc, I

= 1.5 A) g

1.5 — — mhos

DYNAMIC CHARACTERISTICS

Input Capacitance

(V 25 V V 0

iss

— 770 — pF

Output Capacitance

= 25 V, V

= 0,

f = 1.0 MHz

)

oss

— 105 —

Transfer Capacitance

1.0

MHz)

rss

— 19 —

SWITCHING CHARACTERISTICS*

Turn–On Delay Time t

d(on)

— 23 — ns

Rise Time

= 300 V, I

≈ 3.0 A,

= 100 Ω R

=12Ω

— 34 —

Turn–Off Delay Time

100

Ω

(

)

= 10 V)

d(off)

— 58 —

Fall Time

GS(on)

— 35 —

Total Gate Charge

(V 420 V I 3 0 A

— 28 31 nC

Gate–Source Charge

= 420 V, I

= 3.0 A,

= 10 V

)

— 5.0 —

Gate–Drain Charge

— 17 —

SOURCE–DRAIN DIODE CHARACTERISTICS

Forward On–Voltage V

— — 1.4 Vdc

Forward Turn–On Time

= 3.0 A, di/dt = 100 A/µs)

— ** —

Reverse Recovery Time t

— 400 —

INTERNAL PACKAGE INDUCTANCE

Internal Drain Inductance

(Measured from the contact screw on tab to center of die)

(Measured from the drain lead 0.25″ from package to center of die)

—

3.5

4.5

—

Internal Source Inductance

(Measured from the source lead 0.25″ from package to source bond pad)

— 7.5 —

*Pulse Test: Pulse Width = 300 µs, Duty Cycle ≤ 2.0%.

**Limited by circuit inductance.

4–716

Motorola TMOS Power MOSFET Transistor Device Data

TYPICAL ELECTRICAL CHARACTERISTICS

, DRAIN–TO–SOURCE VOLTAGE (VOLTS)

Figure 1. On–Region Characteristics

, JUNCTION TEMPERATURE (°C)

Figure 2. Gate–Threshold Voltage Variation

With Temperature

, GATE–TO–SOURCE VOLTAGE (VOLTS)

Figure 3. Transfer Characteristics

, JUNCTION TEMPERATURE (°C)

Figure 4. Breakdown Voltage Variation

With Temperature

, DRAIN CURRENT (AMPS)

Figure 5. On–Resistance versus Drain Current

, JUNCTION TEMPERATURE (°C)

Figure 6. On–Resistance Variation

With Temperature

DS(on)

, D

–T

–

ANC

(

)

DS(on)

, DRAIN–TO–SOURCE ON–RESISTANCE

(NORMALIZED)

, D

N C

URRE

(

AMPS

)

GS(th)

, GATE THRESHOLD VOLTAGE (NORMALIZED)

BR(DSS)

, DRAIN–TO–SOURCE BREAKDOWN VOLTAGE

(NORMALIZED)

201612840

1.2

1.1

0.9

0.8

–50 –25 0 25 50 75 100 125 150

86420

1.2

1.1

0.9

0.8

–50 0 50 100 150

106420

7 V

6 V

5 V

= V

= 0.25 mA

= 25°C

–55°C

100°C

= 0

= 250 µA

= 10 V

= 2 A

, D

N C

URRE

(

AMPS

)

= 10 V

0.7

≥ 10 V

1 3 5 7 9 –25 25 75 125

–50 0 50 100 150–25 25 75 125

= 25°C

–55°C

100°C

2 6 10 14 18

4–717

Motorola TMOS Power MOSFET Transistor Device Data

SAFE OPERATING AREA INFORMATION

, DRAIN CURRENT (AMPS)

, DRAIN–TO–SOURCE VOLTAGE (VOLTS)

Figure 7. Maximum Rated Forward Biased

Safe Operating Area

, DRAIN–TO–SOURCE VOLTAGE (VOLTS)

Figure 8. Maximum Rated Switching

Safe Operating Area

0 200 400

100

DS(on)

LIMIT

THERMAL LIMIT

PACKAGE LIMIT

= 20 V

SINGLE PULSE

= 25°C

100

10 µs

1 ms

10 ms

800

0.1

100 µs

≤ 150°C

1000

600

FORWARD BIASED SAFE OPERATING AREA

The FBSOA curves define the maximum drain–to–source

voltage and drain current that a device can safely handle

when it is forward biased, or when it is on, or being turned on.

Because these curves include the limitations of simultaneous

high voltage and high current, up to the rating of the device,

they are especially useful to designers of linear systems. The

curves are based on a case temperature of 25°C and a maxi-

mum junction temperature of 150°C. Limitations for repetitive

pulses at various case temperatures can be determined by

using the thermal response curves. Motorola Application

Note, AN569, “Transient Thermal Resistance–General Data

and Its Use” provides detailed instructions.

SWITCHING SAFE OPERATING AREA

The switching safe operating area (SOA) of Figure 8 is the

boundary that the load line may traverse without incurring

damage to the MOSFET. The fundamental limits are the

peak current, I

and the breakdown voltage, V

(BR)DSS

. The

switching SOA shown in Figure 8 is applicable for both turn–

on and turn–off of the devices for switching times less than

one microsecond.

The power averaged over a complete switching cycle must

be less than:

J(max)

– T

θJC

Figure 9. Resistive Switching Time

Variation versus Gate Resistance

(

)

, GATE RESISTANCE (OHMS)

= 300 V

= 3 A

GS(on)

= 10 V

= 25°C

d(off)

d(on)

10001

0000

100

1000

10 100

Figure 10. Thermal Response

r(t), NORMALIZED EFFECTIVE

TRANSIENT THERMAL RESISTANCE

θJC

(t) = r(t) R

θJC

= 1.67°C/W MAX

D CURVES APPLY FOR POWER

PULSE TRAIN SHOWN

READ TIME AT t

J(pk)

– T

= P

(pk)

θJC

(t)

(pk)

DUTY CYCLE, D = t

t, TIME (ms)

0.01

D = 0.5

0.05

0.01

SINGLE PULSE

0.01

0.02

0.03

0.02

0.05

0.1

0.2

0.3

0.5

0.02 0.05 0.1 0.2 0.5 1 2 5 10 20 50 100 200 500 1 k

0.2

0.1