Справочник по мощным TMOS транзисторам (MOTOROLA)
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4–288
Motorola TMOS Power MOSFET Transistor Device Data
SIMPLIFIED BLOCK DIAGRAM
PULSE
GEN
UV
DETECT
PULSE
FILTER
HV
LEVEL
SHIFT
COM
LO
V
CC
V
S
V
B
HO
R
R
S
Q
IN
UV
DETECT
DEAD
TIME
DEAD
TIME
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute
voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air
conditions.
Rating
Symbol Min Max Unit
High Side Floating Supply Absolute Voltage V
B
–0.3 625 V
DC
High Side Floating Supply Offset Voltage
High Side Floating Out
p
ut Voltage
V
S
V
HO
V
B
–25
V
S
03
V
B
+0.3
V
B
+0 3
High
Side
Floating
Output
Voltage
Low Side Fixed Suppl
y
Volta
g
e
V
H
O
V
CC
V
S
–
0
.
3
–0.3
V
B
+0
.
3
25
Low
Side
Fixed
Su ly
Voltage
Low Side Output Voltage
LiI Vl
V
CC
V
LO
V
0.3
–0.3
03
25
V
CC
+0.3
V03
Logic Input Voltage V
IN
–0.3 V
CC
+0.3
Allowable Offset Supply Voltage Transient dV
S
/dt – 50 V/ns
*Package Power Dissipation @ T
C
≤ +25°C (8 Lead DIP)
(8 Lead SOIC)
P
D
–
–
–
1.0
0.625
Watt
Thermal Resistance, Junction to Ambient (8 Lead DIP)
(8 Lead SOIC)
R
θJA
–
–
125
200
°C/W
Operating and Storage Temperature T
j
, T
stg
–55 150 °C
Lead Temperature for Soldering Purposes, 10 seconds T
L
– 260 °C
RECOMMENDED OPERATING CONDITIONS
The Input/Output logic timing Diagram is shown in Figure 1. For proper operation the device should be used within the recommended condi-
tions. The V
S
offset rating is tested with all supplies biased at 15 V differential.
High Side Floating Supply Absolute Voltage
V
B
V
S
+10 V
S
+20
V
High Side Floating Supply Offset Voltage V
S
Note 1 600
High Side Floating Output Voltage V
HO
V
S
V
B
Low Side Fixed Supply Voltage V
CC
10 20
Low Side Output Voltage V
LO
0 V
CC
mA
Logic Input Voltage V
IN
0 V
CC
Ambient Temperature T
A
–40 125 °C
Note 1: Logic operational for V
S
of –5 to +600 V. Logic state held for V
S
of –5 V to –V
BS
.
4–289
Motorola TMOS Power MOSFET Transistor Device Data
ELECTRICAL CHARACTERISTICS (T
A
= 25°C unless otherwise specified)
Characteristic Symbol Min Typ Max Unit
STATIC ELECTRICAL CHARACTERISTICS
V
BIAS
(V
CC
, V
BS
) = 15 V unless otherwise specified. The V
IN
, V
TH
and I
IN
parameters are referenced to COM. The VO and IO parameters
are referenced to COM and are applicable to the respective output leads: HO or LO.
Logic “1” Input Voltage for HO & Logic “0” Input Voltage for LO @ V
CC
= 10 V V
IH
6.4 – –
V
DC
Logic “1” Input Voltage for HO & Logic “0” Input Voltage for LO @ V
CC
= 15 V V
IH
9.5 – –
Logic “1” Input Voltage for HO & Logic “0” Input Voltage for LO @ V
CC
= 20 V V
IH
12.6 – –
Logic “0” Input Voltage for HO & Logic “1” Input Voltage for LO @ V
CC
= 10 V V
IL
– – 3.8
Logic “0” Input Voltage for HO & Logic “1” Input Voltage for LO @ V
CC
= 15 V V
IL
– – 6.0
Logic “0” Input Voltage for HO & Logic “1” Input Voltage for LO @ V
CC
= 20 V V
IL
– – 8.3
High Level Output Voltage, V
BIAS
–V
O
@ I
O
= 0 A V
OH
– – 100
mV
Low Level Output Voltage, V
O
@ I
O
= 0 A V
OL
– – 100
Offset Supply Leakage Current @ V
B
= V
S
= 600 V I
LK
– – 50
µA
Quiescent V
BS
Supply Current @ V
IN
= 0 V or V
CC
I
QBS
– 50 –
Quiescent V
CC
Supply Current @ V
IN
= 0 V or V
CC
I
QCC
– 70 –
Logic “1” Input Bias Current @ V
IN
= 15 V I
IN+
– 20 40
Logic “0” Input Bias Current @ V
IN
= 0 V I
IN–
– – 1.0
V
BS
Supply Undervoltage Positive Going Threshold V
BSUV+
– 8.5 –
V
V
BS
Supply Undervoltage Negative Going Threshold V
BSUV–
– 8.2 –
V
CC
Supply Undervoltage Positive Going Threshold V
CCUV+
– 8.6 –
V
CC
Supply Undervoltage Negative Going Threshold V
CCUV–
– 8.2 –
Output High Short Circuit Pulsed Current @ V
OUT
= 0 V, PW ≤ 10 µs I
O+
200 250 –
mA
Output Low Short Circuit Pulsed Current @ V
OUT
= 15 V, PW ≤ 10 µs I
O–
420 500 –
DYNAMIC ELECTRICAL CHARACTERISTICS
V
BIAS
(V
CC
, V
BS
) = 15 V unless otherwise specified
Turn–On Propagation Delay @ V
S
= 0 V t
on
– 850 –
ns
Turn–Off Propagation Delay @ V
S
= 600 V t
off
– 150 –
Turn–On Rise Time @ C
L
= 1000 pF t
r
– 80 –
Turn–Off Fall Time @ C
L
= 1000 pF t
f
– 40 –
Deadtime, LS Turn–Off to HS Turn–On & HS Turn–Off to LS Turn–On DT – 700 –
Delay Matching, HS & LS Turn–On/Off MT – 30 –
TYPICAL CONNECTION
IN
V
CC
V
CC
IN
COM
V
S
HO
V
B
LO
TO
LOAD
10 TO 600 V
4–290
Motorola TMOS Power MOSFET Transistor Device Data
LEAD DEFINITIONS
Symbol Lead Description
IN Logic Input for High Side and Low Side Gate Driver Outputs (HO & LO), In Phase with HO
V
B
High Side Floating Supply
HO High Side Gate Drive Output
V
S
High Side Floating Supply Return
V
CC
Low Side Supply
L
O
Low Side Gate Drive Output
COM Logic and Low Side Return
Figure 1. Input / Output Timing Diagram
Figure 2. Switching Time Waveform
Definitions
HO
IN
Figure 3. Deadtime Waveform Definitions
IN
50% 50%
IN (LO)
IN (HO)
LO
HO
50% 50%
10% 10%
90% 90%
t
r
LO
t
on
t
f
t
off
HO
LO
90%
90%
10%
10%
DT
4–291
Motorola TMOS Power MOSFET Transistor Device Data
Power Products Division
The MPIC2112 is a high voltage, high speed, power MOSFET and IGBT driver
with independent high and low side referenced output channels. Proprietary HVIC
and latch immune CMOS technologies enable ruggedized monolithic construction.
Logic inputs are compatible with standard CMOS or LSTTL outputs. The output
drivers feature a high pulse current buffer stage designed for minimum driver
cross–conduction. Propagation delays are matched to simplify use in high frequen-
cy applications. The floating channel can be used to drive an N–channel power
MOSFET or IGBT in the high side configuration which operates from 10 to 600
volts.
• Floating Channel Designed for Bootstrap Operation
• Fully Operational to +600 V
• Tolerant to Negative Transient Voltage
• dV/dt Immune
• Gate Drive Supply Range from 10 to 20 V
• Undervoltage Lockout for Both Channels
• Separate Logic Supply
• Operating Supply Range from 5 to 20 V
• Logic and Power Ground Operating Offset Range from –5 to +5 V
• CMOS Schmitt–triggered Inputs with Pull–down
• Cycle by Cycle Edge–triggered Shutdown Logic
• Matched Propagation Delay for Both Channels
• Outputs in Phase with Inputs
PRODUCT SUMMARY
V
OFFSET 600
V
MAX
I
O+/– 200
mA/400
mA
V
OUT 10
–
20
V
t
on/off
(typical)
125
&
105
ns
Delay Matching
30
ns
PIN CONNECTIONS
(TOP VIEW)
8
HO
9
V
DD
10
HIN
11
SD
12
LIN
13
V
SS
14
7
6
5
4
3
2
1
V
B
V
S
V
CC
COM
LO
9
HO
V
DD
11
HIN
12
SD
13
LIN
14
V
SS
15
8
7
6
5
4
3
2
V
B
V
S
V
CC
COM
LO
14 LEADS PDIP MPIC2112P
16 1
10
16 LEADS SOIC (WIDE BODY)
MPIC2112DW
SEMICONDUCTOR TECHNICAL DATA
Device
Package
HIGH AND LOW
SIDE DRIVER
ORDERING INFORMATION
MPIC2112P PDIP
MPIC2112DW SOIC WIDE
DW SUFFIX
PLASTIC PACKAGE
CASE 751G–02
SOIC – WIDE
16
1
P SUFFIX
PLASTIC PACKAGE
CASE 646–06
14
1
4–292
Motorola TMOS Power MOSFET Transistor Device Data
SIMPLIFIED BLOCK DIAGRAM
PULSE
GEN
UV
DETECT
PULSE
FILTER
HV
LEVEL
SHIFT
COM
LO
V
CC
V
S
V
B
HO
R
R
S
Q
V
DD
HIN
SD
LIN
V
SS
UV
DETECT
DELAY
V
DD
/V
CC
LEVEL
SHIFT
V
DD
/V
CC
LEVEL
SHIFT
RQ
S
RQ
S
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute
voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air
conditions.
Rating
Symbol Min Max Unit
Hi
g
h Side Floatin
g
Absolute Volta
g
e V
B
–0.3 625 V
DC
High
Side
Floating
Absolute
Voltage
Hi
g
h Side Floatin
g
Suppl
y
Offset Volta
g
e
V
B
V
S
0.3
V
B
–25
625
V
B
+0.3
V
DC
ggyg
High Side Floating Output Voltage
S
V
HO
B
V
S
–0.3
B
V
B
+0.3
ggg
Low Side Fixed Supply Voltage
HO
V
CC
S
–0.3
B
25
yg
Low Side Output Voltage
CC
V
LO
–0.3 V
CC
+0.3
Logic Supply Voltage
L i S l Off V l
V
DD
V
–0.3
V
V
SS
+25
V
Logic Supply Offset Voltage
L i I t V lt (HIN LIN & SD)
V
SS
V
V
CC
–25
V03
V
CC
+0.3
V03
Logic Input Voltage (HIN, LIN & SD) V
IN
V
SS
–0.3 V
DD
+0.3
Allowable Offset Supply Voltage Transient dV
S
/dt – 50 V/ns
*Package Power Dissipation @ T
A
≤ +25°C (14 Lead DIP)
(16 SOIC–WIDE)
P
D
–
–
–
1.6
1.25
Watt
Thermal Resistance, Junction to Ambient (14 Lead DIP)
(16 SOIC–WIDE)
R
θJA
–
–
75
100
°C/W
Operating and Storage Temperature T
j
, T
stg
–55 150 °C
Lead Temperature for Soldering Purposes, 10 seconds T
L
– 260 °C
RECOMMENDED OPERATING CONDITIONS
The Input/Output logic timing Diagram is shown in Figure 1. For proper operation the device should be used within the recommended condi-
tions. The V
S
and V
SS
offset ratings are tested with all supplies biased at 15 V differential.
High Side Floating Supply Absolute Voltage
V
B
V
S
+10 V
S
+20
V
High Side Floating Supply Offset Voltage V
S
Note 1 600
High Side Floating Output Voltage V
HO
V
S
V
B
Low Side Fixed Supply Voltage V
CC
10 20
Low Side Output Voltage V
LO
0 V
CC
Logic Supply Voltage V
DD
V
SS
+5 V
SS
+20
Logic Supply Offset Voltage V
SS
–5 5
Logic Input Voltage (HIN, LIN & SD) V
IN
V
SS
V
DD
Ambient Temperature T
A
–40 125 °C
Note 1: Logic operational for V
S
of –5 to +600 V. Logic state held for V
S
of –5 V to –V
BS
.
4–293
Motorola TMOS Power MOSFET Transistor Device Data
ELECTRICAL CHARACTERISTICS (T
C
= 25°C unless otherwise specified)
Characteristic Symbol Min Typ Max Unit
STATIC ELECTRICAL CHARACTERISTICS – SUPPLY CHARACTERISTICS
V
BIAS
(V
CC
, V
BS,
V
DD
) = 15 V and V
SS
= COM unless otherwise specified. The V
IN
, V
TH
and I
IN
parameters are referenced to V
SS
and are
applicable to all three logic input leads: HIN, LIN and SD. The VO and IO parameters are referenced to COM or V
SS
and are applicable to
the respective output leads: HO or LO.
Logic “1” Input Voltage V
IH
9.5 – –
V
Logic “0” Input Voltage V
IL
– – 6.0
High Level Output Voltage, V
BIAS
–V
O
@ V
IN
= V
IH
, I
O
= 0 A V
OH
– – 100
mV
Low Level Output Voltage, V
O
@ V
IN
= V
IL
, I
O
= 0 A V
OL
– – 100
Offset Supply Leakage Current @ V
B
= V
S
= 600 V I
LK
– – 50
µA
Quiescent V
BS
Supply Current @ V
IN
= 0 V or V
DD
I
QBS
– 25 60
Quiescent V
CC
Supply Current @ V
IN
= 0 V or V
DD
I
QCC
– 80 180
Quiescent V
DD
Supply Current @ V
IN
= 0 V or V
DD
I
QDD
– 2.0 5.0
Logic “1” Input Bias Current @ V
IN
= 15 V I
IN+
– 20 40
Logic “0” Input Bias Current @ V
IN
= 0 V I
IN–
– – 1.0
V
BS
Supply Undervoltage Positive Going Threshold V
BSUV+
7.4 – 9.6
V
V
BS
Supply Undervoltage Negative Going Threshold V
BSUV–
7.0 – 9.2
V
CC
Supply Undervoltage Positive Going Threshold V
CCUV+
7.6 – 9.6
V
CC
Supply Undervoltage Negative Going Threshold V
CCUV–
7.2 – 9.2
Output High Short Circuit Pulsed Current
@ V
OUT
= 0 V, V
IN
= 15 V, PW ≤10 µs
I
O+
200 250 –
mA
Output Low Short Circuit Pulsed Current
@ V
OUT
= 15 V, V
IN
= 0 V, PW ≤ 10 µs
I
O–
420 500 –
DYNAMIC ELECTRICAL CHARACTERISTICS
V
BIAS
(V
CC
, V
BS
, V
DD
) = 15 V and V
SS
= COM unless otherwise specified. T
A
= 25°C.
Turn–On Propagation Delay @ V
S
= 0 V t
on
– 125 180
ns
Turn–Off Propagation Delay @ V
S
= 600 V t
off
– 105 160
Shutdown Propagation Delay @ V
S
= 600 V t
sd
– 105 160
Turn–On Rise Time @ C
L
= 1000 pF t
r
– 80 130
Turn–Off Fall Time @ C
L
= 1000 pF t
f
– 40 65
Delay Matching, HS & LS Turn–On/Off MT – – 30
TYPICAL CONNECTION
TO
LOAD
10 TO 600 V
V
DD
HIN
SD
V
SS
V
S
HO
V
B
LIN
V
DD
HIN
SD
V
SS
LIN
V
CC
LO
V
CC
COM
4–294
Motorola TMOS Power MOSFET Transistor Device Data
LEAD DEFINITIONS
Symbol Lead Description
V
DD
Logic Supply
HIN Logic Input for High Side Gate Driver Output (HO), In Phase
SD Logic Input for Shutdown
LIN Logic Input for Low Side Gate Driver Output (LO), In Phase
V
SS
Logic Ground
V
B
High Side Floating Supply
HO High Side Gate Drive Output
V
S
High Side Floating Supply Return
V
CC
Low Side Supply
LO Low Side Gate Drive Output
COM Low Side Return
Figure 1. Input / Output Timing Diagram
Figure 2. Switching Time Waveform
Definitions
Figure 3. Deadtime Waveform Definitions
HIN
LIN
SD
HO
LO
HIN
LIN
HO
LO
10% 10%
90% 90%
t
on
t
r
50% 50%
t
off
t
f
Figure 4. Delay Matching Waveform
Definitions
50%
90%
HO
LO
SD
t
sd
10%
50%50%
90%
HIN
LIN
LO HO
LO HO
MT MT
4–295
Motorola TMOS Power MOSFET Transistor Device Data
Power Products Division
The MPIC2113 is a high voltage, high speed, power MOSFET and IGBT driver
with independent high and low side referenced output channels. Proprietary HVIC
and latch immune CMOS technologies enable ruggedized monolithic construction.
Logic inputs are compatible with standard CMOS or LSTTL outputs. The output
drivers feature a high pulse current buffer stage designed for minimum driver
cross–conduction. Propagation delays are matched to simplify use in high frequen-
cy applications. The floating channel can be used to drive an N–channel power
MOSFET or IGBT in the high side configuration which operates from 10 to 600
volts.
• Floating Channel Designed for Bootstrap Operation
• Fully Operational to +600 V
• Tolerant to Negative Transient Voltage
• dV/dt Immune
• Gate Drive Supply Range from 10 to 20 V
• Undervoltage Lockout for Both Channels
• Separate Logic Supply
• Operating Supply Range from 5 to 20 V
• Logic and Power Ground Operating Offset Range from –5 to +5 V
• CMOS Schmitt–triggered Inputs with Pull–down
• Cycle by Cycle Edge–triggered Shutdown Logic
• Matched Propagation Delay for Both Channels
• Outputs In Phase with Inputs
PRODUCT SUMMARY
V
OFFSET 600
V
MAX
I
O+/– 2
A/2
A
V
OUT 10
–
20
V
t
on/off
(typical)
120
&
94
ns
Delay Matching
10
ns
PIN CONNECTIONS
(TOP VIEW)
8
HO
9
V
DD
10
HIN
11
SD
12
LIN
13
V
SS
14
7
6
5
4
3
2
1
V
B
V
S
V
CC
COM
LO
9
HO
V
DD
11
HIN
12
SD
13
LIN
14
V
SS
15
8
7
6
5
4
3
2
V
B
V
S
V
CC
COM
LO
14 LEADS PDIP MPIC2113P
16 1
10
16 LEADS SOIC (WIDE BODY)
MPIC2113DW
This document contains information on a new product. Specifications and information herein are subject
to change without notice.
SEMICONDUCTOR TECHNICAL DATA
Device
Package
HIGH AND LOW
SIDE DRIVER
ORDERING INFORMATION
MPIC2113P PDIP
MPIC2113DW SOIC WIDE
DW SUFFIX
PLASTIC PACKAGE
CASE 751G–02
SOIC – WIDE
16
1
P SUFFIX
PLASTIC PACKAGE
CASE 646–06
14
1
4–296
Motorola TMOS Power MOSFET Transistor Device Data
SIMPLIFIED BLOCK DIAGRAM
PULSE
GEN
UV
DETECT
PULSE
FILTER
HV
LEVEL
SHIFT
COM
LO
V
CC
V
S
V
B
HO
R
R
S
Q
V
DD
HIN
SD
LIN
V
SS
UV
DETECT
DELAY
V
DD
/V
CC
LEVEL
SHIFT
V
DD
/V
CC
LEVEL
SHIFT
RQ
S
RQ
S
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute
voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air
conditions.
Rating
Symbol Min Max Unit
Hi
g
h Side Floatin
g
Absolute Volta
g
e V
B
–0.3 625 V
DC
High
Side
Floating
Absolute
Voltage
Hi
g
h Side Floatin
g
Suppl
y
Offset Volta
g
e
V
B
V
S
0.3
V
B
–25
625
V
B
+0.3
V
DC
ggyg
High Side Floating Output Voltage
S
V
HO
B
V
S
–0.3
B
V
B
+0.3
ggg
Low Side Fixed Supply Voltage
HO
V
CC
S
–0.3
B
25
yg
Low Side Output Voltage
CC
V
LO
–0.3 V
CC
+0.3
Logic Supply Voltage
L i S l Off V l
V
DD
V
–0.3
V
V
SS
+25
V
Logic Supply Offset Voltage
L i I t V lt (HIN LIN & SD)
V
SS
V
V
CC
–25
V03
V
CC
+0.3
V03
Logic Input Voltage (HIN, LIN & SD) V
IN
V
SS
–0.3 V
DD
+0.3
Allowable Offset Supply Voltage Transient dV
S
/dt – 50 V/ns
*Package Power Dissipation @ T
A
≤ +25°C (14 Lead DIP)
(16 SOIC–WIDE)
P
D
–
–
–
1.6
1.25
Watt
Thermal Resistance, Junction to Ambient (14 Lead DIP)
(16 SOIC–WIDE)
R
θJA
–
–
75
100
°C/W
Operating and Storage Temperature T
j
, T
stg
–55 150 °C
Lead Temperature for Soldering Purposes, 10 seconds T
L
– 260 °C
RECOMMENDED OPERATING CONDITIONS
The Input/Output logic timing Diagram is shown in Figure 1. For proper operation the device should be used within the recommended condi-
tions. The V
S
and V
SS
offset ratings are tested with all supplies biased at 15 V differential.
High Side Floating Supply Absolute Voltage
V
B
V
S
+10 V
S
+20
V
High Side Floating Supply Offset Voltage V
S
Note 1 600
High Side Floating Output Voltage V
HO
V
S
V
B
Low Side Fixed Supply Voltage V
CC
10 20
Low Side Output Voltage V
LO
0 V
CC
Logic Supply Voltage V
DD
V
SS
+5 V
SS
+20
Logic Supply Offset Voltage V
SS
–5 5
Logic Input Voltage (HIN, LIN & SD) V
IN
V
SS
V
DD
Ambient Temperature T
A
–40 125 °C
Note 1: Logic operational for V
S
of –5 to +600 V. Logic state held for V
S
of –5 V to –V
BS
.
4–297
Motorola TMOS Power MOSFET Transistor Device Data
ELECTRICAL CHARACTERISTICS (T
A
= 25°C unless otherwise specified)
Characteristic Symbol Min Typ Max Unit
STATIC ELECTRICAL CHARACTERISTICS – SUPPLY CHARACTERISTICS
V
BIAS
(V
CC
, V
BS,
V
DD
) = 15 V and V
SS
= COM unless otherwise specified. The V
IN
, V
TH
and I
IN
parameters are referenced to V
SS
and are
applicable to all three logic input leads: HIN, LIN and SD. The VO and IO parameters are referenced to COM or V
SS
and are applicable to
the respective output leads: HO or LO.
Logic “1” Input Voltage V
IH
9.5 – –
V
Logic “0” Input Voltage V
IL
– – 6.0
High Level Output Voltage, V
BIAS
–V
O
@ V
IN
= V
IH
, I
O
= 0 A V
OH
– – 1.2
Low Level Output Voltage, V
O
@ V
IN
= V
IL
, I
O
= 0 A V
OL
– – 0.1
Offset Supply Leakage Current @ V
B
= V
S
= 600 V I
LK
– – 50
µA
Quiescent V
BS
Supply Current @ V
IN
= 0 V or V
DD
I
QBS
– 125 230
Quiescent V
CC
Supply Current @ V
IN
= 0 V or V
DD
I
QCC
– 180 340
Quiescent V
DD
Supply Current @ V
IN
= 0 V or V
DD
I
QDD
– 15 30
Logic “1” Input Bias Current @ V
IN
= 15 V I
IN+
– 20 40
Logic “0” Input Bias Current @ V
IN
= 0 V I
IN–
– – 1.0
V
BS
Supply Undervoltage Positive Going Threshold V
BSUV+
7.5 – 9.7
V
V
BS
Supply Undervoltage Negative Going Threshold V
BSUV–
7.0 – 9.4
V
CC
Supply Undervoltage Positive Going Threshold V
CCUV+
7.4 – 9.6
V
CC
Supply Undervoltage Negative Going Threshold V
CCUV–
7.0 – 9.4
Output High Short Circuit Pulsed Current
@ V
OUT
= 0 V, V
IN
= 15 V, PW ≤10 µs
I
O+
2.0 2.5 –
A
Output Low Short Circuit Pulsed Current
@ V
OUT
= 15 V, V
IN
= 0 V, PW ≤ 10 µs
I
O–
2.0 2.5 –
DYNAMIC ELECTRICAL CHARACTERISTICS
V
BIAS
(V
CC
, V
BS
, V
DD
) = 15 V and V
SS
= COM unless otherwise specified. T
A
= 25°C.
Turn–On Propagation Delay @ V
S
= 0 V t
on
– 120 150
ns
Turn–Off Propagation Delay @ V
S
= 600 V t
off
– 94 125
Shutdown Propagation Delay @ V
S
= 600 V t
sd
– 110 140
Turn–On Rise Time @ C
L
= 1000 pF t
r
– 25 35
Turn–Off Fall Time @ C
L
= 1000 pF t
f
– 17 25
Delay Matching, HS & LS Turn–On/Off MT – – 10
TYPICAL CONNECTION
TO
LOAD
10 TO 600 V
V
DD
HIN
SD
V
SS
V
S
HO
V
B
LIN
V
DD
HIN
SD
V
SS
LIN
V
CC
LO
V
CC
COM