
14.63 Consider the simplified op-amp shown in Figure 14.11. Use standard tran-
sistors and take the output at the collector of
Q
6
. Assume the bias current for
Q
1
and
Q
2
is
I
Q
= 19 μA
and the bias current for
Q
5
and
Q
6
is
I
Q
= 0.15
mA.
Let
C
1
= 30
pF. (a) Using a computer simulation, determine the slew rate of
the amplifier. (b) Using a computer simulation, determine the small-signal
bandwidth for (i)
v
d
= 1 μ
V and (ii)
v
d
= 5 μ
V. Use an appropriate load.
14.64 The equivalent circuit of the all-CMOS MC14573 op-amp was given in
Figure 13.14. Using a computer simulation, determine the slew rate of the
op-amp assuming
C
1
= 12
pF. Use standard transistors.
14.65 A basic bipolar input diff-amp stage is shown in Figure 14.22. Use standard
transistors and other appropriate circuit parameters. Let
v
1
= v
2
= 0
.
(a) Plot
i
C1
and
i
C2
as a function of the wiper arm position
x
. (b) Plot the
collector voltage of
Q
4
as a function of wiper arm position
x
.
DESIGN PROBLEMS
[Note: Each design should be verified with a computer analysis.]
*D14.66An amplifier system, using op-amps, is to be designed to provide a low-
frequency voltage gain of 50 and a bandwidth of 20 kHz. The only available
op-amps have a low-frequency open-loop voltage gain of
3 × 10
4
and a
bandwidth of 10 Hz. Design an appropriate system.
*D14.67Consider the simplified op-amp in Figure 14.11. Neglect the emitter-fol-
lower output stage. Assume bias voltages of
V
+
= 3
V and
V
−
=−3V
. Let
the bias current for
Q
5
and
Q
6
be
I
Q
= 0.1
mA. The total power dissipated
in the circuit is to be limited to 0.65 mW. Design the circuit such that the
slew rate is
2
V/
μ
s. Determine
I
Q
for
Q
1
and
Q
2
, and find the appropriate
value for
C
1
.
*D14.68Consider the op-amp circuit shown in Figure P14.12. Each op-amp has an
offset voltage of
V
OS
= 2
mV. Design an offset voltage compensation
circuit. Assume bias voltages are limited to
±5
V.
*D14.69Consider the op-amp circuit shown in Figure P14.12. Each op-amp has an
average input bias current of
I
B
= 1 μ
A and the offset bias current is
I
OS
= 0.1 μ
A. Design an optimum bias-current compensation circuit. What
is the possible range of output voltage
v
O2
for
v
I
= 0
?
1060 Part 2 Analog Electronics
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