
Chapter 7 Frequency Response 515
inversion charge near the source and drain terminals, respectively. If the device is
biased in the nonsaturation region and
v
DS
is small, the channel inversion charge is
approximately uniform, which means that
C
gs
∼
=
C
gd
∼
=
1
2
WLC
ox
where
C
ox
(F/cm
2
) =
ox
/t
ox
. The parameter
ox
is the oxide permittivity, which for
silicon MOSFETs is
ox
= 3.9
o
, where
o
= 8.85 ×10
−14
F/cm is the permittivity
of free space. The parameter
t
ox
is the oxide thickness in cm.
However, when the transistor is biased in the saturation region, the channel is
pinched off at the drain and the inversion charge is no longer uniform. The value of
C
gd
essentially goes to zero, and
C
gs
approximately equals
(2/3)WLC
ox
. As an ex-
ample, if a device has an oxide thickness of 100 Å, a channel length of
L = 0.18 μ
m,
and a channel width of
W = 20 μ
m, the value of
C
gs
is
C
gs
∼
=
8.3
fF. The value of
C
gs
changes as the device size changes, but typical values are in the tens of femto-
farads range.
The remaining two gate capacitances,
C
gsp
and
C
gdp
, are parasitic or overlap
capacitances, so called because, in actual devices, the gate oxide overlaps the source
and drain contacts, because of tolerances or other fabrication factors. As we will see,
the drain overlap capacitance
C
gdp
lowers the bandwidth of the FET. The parameter
C
ds
is the drain-to-substrate pn junction capacitance, and
r
s
and
r
d
are the series re-
sistances of the source and drain terminals. The internal gate-to-source voltage con-
trols the small-signal channel current through the transconductance.
The small-signal equivalent circuit for the n-channel common-source MOSFET
is shown in Figure 7.50. Voltage
V
gs
is the internal gate-to-source voltage that con-
trols the channel current. We will assume that the gate-to-source and gate-to-drain
capacitances,
C
gs
and
C
gd
, contain the parasitic overlap capacitances. One parame-
ter,
r
o
, shown in Figure 7.50 is not shown in Figure 7.49. This resistance is associated
with the slope of
I
D
versus
V
DS
. In the ideal MOSFET biased in the saturation re-
gion,
I
D
is independent of
V
DS
, which means that
r
o
is infinite. However,
r
o
is finite
in short-channel-length devices, because of channel-length modulation, and is there-
fore included in the equivalent circuit.
Source resistance r
s
can have a significant effect on the transistor characteristics.
To illustrate, Figure 7.51 shows a simplified low-frequency equivalent circuit in-
cluding r
s
but not r
o
. For this circuit, the drain current is
I
d
= g
m
V
gs
(7.88)
C
gs
r
o
g
m
V'
gs
C
gd
r
d
+
–
V'
gs
C
ds
D
G
S
+
–
V
gs
r
s
Figure 7.50 Equivalent circuit of the n-channel
common-source MOSFET
I
d
++
–
V
gs
–
r
s
g
m
V'
gs
V'
gs
G D
S
Figure 7.51 Simplified low-frequency
equivalent circuit of the n-channel
common-source MOSFET including
source resistance
r
s
but not resistance
r
o
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