Neamen D. Microelectronics: Circuit Analysis and Design

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568 Part 1 Semiconductor Devices and Basic Applications

(a) (b) (c)

Figure 8.10 Two packaging schemes: (a) and (b) for power transistors and (c) typical

heat sink

where P is the thermal power through the element. Temperature difference is the

electrical analog of voltage, and power or heat flow is the electrical analog of

current.

Manufacturers’ data sheets for power devices generally give the maximum

operating junction or device temperature T

j,max

and the thermal resistance from the

junction to the case

= θ

dev−case

By deﬁnition, the thermal resistance between the

case and heat sink is

case−snk

, and between the heat sink and ambient is

snk−amb

The temperature difference between the device and the ambient can now be

written as follows, when a heat sink is used:

dev

− T

amb

= P

(θ

dev−case

+θ

case−snk

+θ

snk−amb

)

(8.6)

where P

is the power dissipated in the device. Equation (8.6) may also be modeled

by its equivalent electrical elements, as shown in Figure 8.11. The temperature

difference across the elements, such as the case and heat sink, is the dissipated

power P

multiplied by the applicable thermal resistance, which is

case−snk

for this

example.

If a heat sink is not used, the temperature difference between the device and

ambient is written as

dev

− T

amb

= P

(θ

dev−case

+θ

case−amb

)

(8.7)

where

case−amb

is the thermal resistance between the case and ambient.

EXAMPLE 8.2

Objective: Determine the maximum power dissipation in a transistor and determine

the temperature of the transistor case and heat sink.

Consider a power MOSFET for which the thermal resistance parameters are:

dev−case

= 1.75

◦

C/W θ

case−snk

= 1

◦

C/W

snk−amb

= 5

◦

C/W θ

case−amb

= 50

◦

C/W

The ambient temperature is

amb

= 30

°C, and the maximum junction or device

temperature is

j,max

= T

dev

= 150

°C.

In this short discussion, we use a more descriptive subscript notation to help clarify the discussion.

dev

case

snk

amb

dev-case

case-snk

snk-amb

Figure 8.11 Electrical

equivalent circuit for heat

ﬂow from the device to the

ambient

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Chapter 8 Output Stages and Power Ampliﬁers 569

Solution (Maximum Power): When no heat sink is used, the maximum device power

dissipation is found from Equation (8.7) as

D,max

j,max

− T

amb

dev−case

+θ

case−amb

150 − 30

1.75 + 50

= 2.32 W

When a heat sink is used, the maximum device power dissipation is found from

Equation (8.6) as

D,max

j,max

− T

amb

dev−case

+θ

case−snk

+θ

snk−amb

150 − 30

1.75 + 1 +5

= 15.5W

Solution (Temperature): The device temperature is

T = 150

°C and the ambient

temperature is

amb

= 30

°C. The heat ﬂow is

= 15.5

W. The heat sink tempera-

ture (see Figure 8.11) is found from

snk

− T

amb

= P

· θ

snk−amb

snk

= 30 +(15.5)(5) ⇒ T

snk

= 107.5

◦

The case temperature is found from

case

− T

amb

= P

· (θ

case−snk

+θ

snk−case

)

case

= 30 +(15.5)(1 +5) ⇒ T = 123

◦

Comment: These results illustrate that the use of a heat sink allows more power to

be dissipated in the device, while keeping the device temperature at or below its

maximum limit.

EXERCISE PROBLEM

Ex 8.2: A power BJT is operating with an average collector current of

= 2

and an average collector–emitter voltage of

= 8

V. The device parameters are

dev−case

= 3

◦

C/W,

case−snk

= 1

◦

C/W, and

snk−amb

= 4

◦

C/W. The ambient

temperature is

◦

C. Determine the temperatures of the (a) device, (b) case, and

153

◦

C, (b)

105

◦

C, (c)

◦

The maximum safe power dissipation in a device is a function of: (1) the

temperature difference between the junction and case, and (2) the thermal resistance

between the device and the case

dev−case

,or

D,max

j,max

− T

case

dev−case

(8.8)

A plot of P

D,max

versus T

case

, called the power derating curve of the transistor,

is shown in Figure 8.12. The temperature at which the power derating curve crosses

the horizontal axis corresponds to T

j, max

. At this temperature, no additional tempera-

ture rise in the device can be tolerated; therefore, the allowed power dissipation must

be zero, which implies a zero input signal.

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570 Part 1 Semiconductor Devices and Basic Applications

The rated power of a device is generally deﬁned as the power at which the

device reaches its maximum temperature, while the case temperature remains at

room or ambient temperature, that is,

case

= 25

°C. Maintaining the case at ambient

temperature implies that the thermal resistance between the case and ambient is zero,

or that an inﬁnite heat sink is used. However, an inﬁnite heat sink is not possible.

With nonzero values of

case−snk

and

snk−amb

, the case temperature rises above the

ambient, and the maximum rated power of the device cannot be achieved. This effect

can be seen by examining the equivalent circuit model in Figure 8.11. If the device

temperature is at its maximum allowed value of T

dev

= T

j,max

, then as T

case

in-

creases, the temperature difference across

dev−case

decreases, which means that

the power through the element must decrease.

EXAMPLE 8.3

Objective: Determine the maximum safe power dissipation in a transistor.

Consider a BJT with a rated power of 20 W and a maximum junction tempera-

ture of

j,max

= 175

◦

C. The transistor is mounted on a heat sink with parameters

case−snk

= 1

◦

C/W

and

snk−amb

= 5

◦

C/W

Solution: From Equation (8.8), the device-to-case thermal resistance is

dev−case

j,max

− T

D,rated

175 − 25

= 7.5

◦

C/W

From Equation (8.6), the maximum power dissipation is

D,max

j,max

− T

amb

dev−case

+θ

case−snk

+θ

snk−amb

175 − 25

7.5 + 1 +5

= 11.1W

Comment: The actual maximum safe power dissipation in a device may be less than

the rated value. This occurs when the case temperature cannot be held at the ambient

temperature, because of the nonzero thermal resistance factors between the case and

ambient.

max

case

= 25 °C T

j, max

D, rated

Figure 8.12 A power derating curve

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Chapter 8 Output Stages and Power Ampliﬁers 571

EXERCISE PROBLEM

Ex 8.3: The rated power of a power BJT is

D,rated

= 50

W, the maximum

allowed junction temperature is

j,max

= 200

°C, and the ambient temperature is

amb

= 25

◦

C. The thermal resistance between the heat sink and air is

snk−amb

◦

C/W

, and that between the case and heat sink is

case−snk

= 0.5

◦

C/W

. Find the

maximum safe power dissipation and the temperature of the case. (Ans.

D,max

29.2 W,

case

= 98

°C)

Test Your Understanding

TYU 8.1 Consider the common-source circuit shown in Figure 8.13. The parameters

are

= 20

 and

= 24

V. Determine the required current, voltage, and power

ratings of the MOSFET. (Ans.

(max) = 1.2

(max) = 24

(max) =

7.2 W)

TYU 8.2 The emitter-follower circuit shown in Figure 8.14 is biased with

= 12

The transistor current gain is

β = 80

, and the transistor limiting factors are

C,max

= 250

mA and

(

sus

)

= 30

V. The transistor

-point is to remain within the

safe operating area at all times. (a) Determine the minimum value of

. (b) Determine

the minimum required transistor power rating. (Ans. (a)

= 96 

, (b)

= 1.5

TYU 8.3 (a) Assume the power ﬂow through a material with a thermal resistance pa-

rameter of

θ = 1.8

◦

C/W is

P = 6

W. Determine the resulting temperature difference

across the material. (b) The thermal resistance of a material is

θ = 2.5

◦

C/W. If the

temperature difference across the material is

T = 100

◦

C, ﬁnd the power ﬂow

through the material. (Ans. (a)

T = 10.8

◦

C, (b)

P = 40

–

Figure 8.13 Figure for

Exercise TYU 8.1 and

Example 8.4

–V

Figure 8.14 Figure for

Exercise TYU 8.2

8.3 CLASSES OF AMPLIFIERS

Objective: • Deﬁne various classes of power ampliﬁers, and investi-

gate the characteristics, including power efﬁciency, of a few of these

ampliﬁers.

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572 Part 1 Semiconductor Devices and Basic Applications

Some power ampliﬁers are classiﬁed according to the percent of time the output

transistors are conducting, or “turned on.” Four of the principal classiﬁcations are:

class A, class B, class AB, and class C. These classiﬁcations are illustrated in Fig-

ure 8.15 for a sinusoidal input signal. In class-A operation, an output transistor is

biased at a quiescent current

and conducts for the entire cycle of the input signal.

For class-B operation, an output transistor conducts for only one-half of each sine

wave input cycle. In class-AB operation, an output transistor is biased at a small

quiescent current

and conducts for slightly more than half a cycle. In contrast, in

class-C operation an output transistor conducts for less than half a cycle. These

four types of power ampliﬁers use the output transistors as a current source. We will

analyze the biasing, load lines, and power efﬁciency of each class of these power

ampliﬁers.

Another classiﬁcation of power ampliﬁers, including class D, class E, and class

F, uses the output transistors as switches. The output of the ampliﬁer is, in general, a

high-

resonant RLC circuit. When the switch is closed, current and power are sup-

plied to the output resonant circuit. In the ideal case, when the switch is closed, there

is zero voltage across the switch, and when the switch is open, there is zero current

through the switch. In both cases, the ideal power dissipated in the switch is zero. The

power efﬁciency of these ampliﬁers can then approach 100 percent.

The intent of this chapter is to provide the basic characteristics of a few of these

power ampliﬁers. As usual, there are other types of power ampliﬁers and power elec-

tronics that are beyond the scope of this text, including high-frequency radio-frequency

(RF) circuit design.

Class-A Operation

The small-signal ampliﬁers considered in Chapters 4 and 6 were all biased for

class-A operation. A basic common-emitter conﬁguration is shown in Figure 8.16(a).

The bias circuitry has been omitted, for convenience. Also, in this standard class-A

ampliﬁer conﬁguration, no inductors or transformers are used.

8.3.1

0 2p 3p 4p

2p 3p 4p

(a) (b)

Figure 8.15 Collector current versus time characteristics: (a) class-A ampliﬁer, (b) class-B

ampliﬁer, (c) class-AB ampliﬁer, and (d) class-C ampliﬁer

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Chapter 8 Output Stages and Power Ampliﬁers 573

The dc load line is shown in Figure 8.16(b). The Q-point is assumed to be in the

center of the load line, so that

CEQ

= V

. If a sinusoidal input signal is applied,

sinusoidal variations are induced in the collector current and collector–emitter volt-

age. The absolute possible variations are shown in the ﬁgure, although values of

= 0

and

= 2I

cannot actually be attained.

The instantaneous power dissipation in the transistor, neglecting the base

current, is

= v

(8.9)

For a sinusoidal input signal, the collector current and collector-emitter voltage can

be written

= I

+ I

sin ωt

(8.10(a))

and

− V

sin ωt

(8.10(b))

If we consider the absolute possible variations, then

= I

and

= V

Therefore, the instantaneous power dissipation in the transistor, from Equa-

tion (8.9), is

(1 − sin

ωt)

(8.11)

Figure 8.16(c) is a plot of the instantaneous transistor power dissipation. Since

the maximum power dissipation corresponds to the quiescent value (see Figure 8.5),

the transistor must be capable of handling a continuous power dissipation of

when the input signal is zero.

The power conversion efﬁciency is deﬁned as

η =

signal load power(

)

supply power(

)

(8.12)

where

is the average ac power delivered to the load and

is the average power

supplied by the V

power source(s). For the standard class-A ampliﬁer and

–

CEQ

Q-point

DC load line

Time

(a) (b) (c)

Figure 8.16 (a) Common-emitter ampliﬁer, (b) dc load line, and (c) instantaneous power

dissipation versus time in the transistor

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574 Part 1 Semiconductor Devices and Basic Applications

sinusoidal input signals, the average ac power delivered to the load is





. Using

the absolute possible variations, we have

(max) =







) =

(8.13)

The average power supplied by the V

source is

= V

(8.14)

The maximum attainable conversion efﬁciency is therefore

η(max) =

⇒ 25%

(8.15)

We must keep in mind that the maximum possible conversion efﬁciency may change

when a load is connected to the output of the ampliﬁer. This efﬁciency is relatively

low; therefore, standard class-A ampliﬁers are normally not used when signal powers

greater than approximately 1 W are required.

We must also emphasize that in practice, a maximum signal voltage of

and

a maximum signal current of I

are not possible. The output signal voltage must be lim-

ited to smaller values in order to avoid transistor saturation and cutoff, and the resulting

nonlinear distortion. The calculation for the maximum possible efﬁciency also neglects

power dissipation in the bias circuitry. Consequently, the realistic maximum conversion

efﬁciency in a standard class-A ampliﬁer is on the order of 20 percent or less.

Design Pointer: In circuit analysis, the maximum power transfer theorem stated that

the load impedance should be matched to the ampliﬁer output impedance, which pro-

vides a 50 percent power conversion efﬁciency. However, in the design of power am-

pliﬁers, this theorem is not practical. For example, if 50 kW is to be delivered to an

antenna, then the circuit would also dissipate 50 kW if the power conversion efﬁ-

ciency were only 50 percent. In general, this amount of power being dissipated in the

ampliﬁer would be unacceptable. Power conversion efﬁciencies as close to 100 per-

cent as possible are desirable in very high power ampliﬁers.

EXAMPLE 8.4

Objective: Calculate the actual efﬁciency of a class-A output stage.

Consider the common-source circuit in Figure 8.13. The circuit parameters are

= 10

V and

= 5

k, and the transistor parameters are:

= 1

mA/V

= 1

V, and

λ = 0

. Assume the output voltage swing is limited to the range

between the transition point and

= 9

V, to minimize nonlinear distortion.

Solution: The load line is given by

= V

− I

At the transition point, we have

(sat) = V

− V

and

= K

− V

)

Combining these expressions, the transition point is determined from

(sat) = V

− K

(sat)

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Chapter 8 Output Stages and Power Ampliﬁers 575

(1)(5)V

(sat) + V

(sat) − 10 = 0

which yields

(sat) = 1.32 V

To obtain the maximum symmetrical swing under the conditions speciﬁed, we want

the Q-point midway between

= 1.32

V and

= 9

V, o r

DSQ

= 5.16 V

The maximum ac component of voltage across the load resistor is then

= 3.84 sin ωt

and the average power delivered to the load is

(3.84)

= 1.47 mW

The quiescent drain current is found to be

10 − 5.16

= 0.968 mA

The average power supplied by the V

source is

= V

= (10)(0.968) = 9.68 mW

and the power conversion efﬁciency, from Equation (8.12), is

η =

1.47

9.68

⇒ 15.2%

Comment: By limiting the swing in the drain–source voltage, to avoid nonsaturation

and cutoff and the resulting nonlinear distortion, we reduce the output stage power

conversion efﬁciency considerably, compared to the theoretical maximum possible

value of 25 percent for the standard class-A ampliﬁer.

EXERCISE PROBLEM

*Ex 8.4: For the common-source circuit shown in Figure 8.17, the Q-point is

DSQ

= 4

V. (a) Find I

. (b) The minimum value of the instantaneous drain

current must be no less than





, and the minimum value of the instanta-

neous drain–source voltage must be no less than

= 1.5

V. Determine the

= 10 V

= 100 Ω

C → ∞

Figure 8.17 Figure for Exercise Ex 8.4

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576 Part 1 Semiconductor Devices and Basic Applications

maximum peak-to-peak amplitude of a symmetrical sinusoidal output voltage.

where the signal power is the power delivered to R

. (Ans. (a)

= 60

(b)

p−p

= 5.0V

(c)

= 31.25 mW

η = 5.2%

)

Class-A operation also applies to the emitter-follower, common-base, source-

follower, and common-gate conﬁgurations. As previously stated, the circuits consid-

ered in Figures 8.13 and 8.16(a) are standard class-A ampliﬁers in that no inductors

or transformers are used. Later in this chapter, we will analyze inductively-coupled

and transformer-coupled power ampliﬁers that also operate in the class-A mode. We

will show that, for these circuits, the maximum conversion efﬁciency is 50 percent.

Class-B Operation

Idealized Class-B Operation

Figure 8.18(a) shows an idealized class-B output stage that consists of a comple-

mentary pair of electronic devices. When

= 0

, both devices are off, the bias

currents are zero, and

= 0

. For

> 0

, device A turns on and supplies current to

the load as shown in Figure 8.18(b). For

< 0

, device B turns on and sinks current

8.3.2

–

(a)

< 0

< O

–

> 0 v

> 0

–

(b)

Slope = 1

Figure 8.18 (a) Idealized class-B output stage with complementary pair, A and B, of

electronic devices; (b) device A turns on for

> 0

, supplying current to the load; (c) device B

turns on for

< 0

, sinking current from the load; (d) ideal voltage transfer characteristics

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Chapter 8 Output Stages and Power Ampliﬁers 577

from the load as shown in Figure 8.18(c). Figure 8.18(d) shows the voltage transfer

characteristics. The ideal voltage gain is unity.

Approximate Class-B Circuit

Figure 8.19 shows an output stage that consists of a complementary pair of bipolar

transistors. When the input voltage is

= 0

, both transistors are cut off and the output

voltage is

= 0

. If we assume a B–E cut-in voltage of 0.6 V, then the output voltage

remains zero as long as the input voltage is in the range

−0.6 ≤ v

≤+0.6V

becomes positive and is greater than 0.6 V, then Q

turns on and operates as

an emitter follower. The load current i

is positive and is supplied through Q

, and the

B–E junction of Q

is reverse biased. If

becomes negative by more than 0.6 V, then

turns on and operates as an emitter follower. Transistor Q

is a sink for the load

current, which means that i

is negative.

This circuit is called a complementary push–pull output stage. Transistor Q

conducts during the positive half of the input cycle, and Q

conducts during the

negative half-cycle. The transistors do not both conduct at the same time.

Figure 8.20 shows the voltage transfer characteristics for this circuit. When

either transistor is conducting, the voltage gain, which is the slope of the curve, is

essentially unity as a result of the emitter follower. Figure 8.21 shows the output

voltage for a sinusoidal input signal. When the output voltage is positive, the npn

transistor is conducting, and when the output voltage is negative, the pnp transistor is

conducting. We can see from this ﬁgure that each transistor actually conducts for

slightly less than half the time. Thus the bipolar push–pull circuit shown in Fig-

ure 8.19 is not exactly a class-B circuit.

We will see that an output stage using NMOS and PMOS transistors will

produce the same general voltage transfer characteristics.

Crossover Distortion

From Figure 8.20, we see that there is a range of input voltage around zero volts where

both transistors are cut off and

is zero. This portion of the curve is called the dead

band. The output voltage for a sinusoidal input voltage is shown in Figure 8.21. The

output voltage is not a perfect sinusoidal signal, which means that crossover distortion

is produced by the dead band region.

–

Figure 8.19 Basic

complementary push–pull

output stage

0.6–0.6

conducting

cutoff

conducting

cutoff

Slope ≅ 1

Figure 8.20 Voltage transfer characteristics of basic

complementary push–pull output stage

Figure 8.21 Crossover distortion of basic

complementary push–pull output stage

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