Neamen D. Microelectronics: Circuit Analysis and Design
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668 Part 2 Analog Electronics
9.9 SUMMARY
• In this chapter, we considered the ideal operational amplifier (op-amp) and var-
ious op-amp applications. The op-amp is a three-terminal device (three signal
terminals) that ideally amplifies only the difference between two input signals.
The op-amp, then, is a high-gain differential amplifier.
• The ideal op-amp model has infinite input impedance (zero input bias currents),
infinite open-loop differential voltage gain (zero voltage between the two input
terminals), and zero output impedance.
• Two basic op-amp circuits are the inverting amplifier and the noninverting am-
plifier. For an ideal op-amp, the voltage gain of these circuits is just a function of
the ratio of resistors.
• Other amplifier configurations considered were the summing amplifier, voltage
follower, current-to-voltage converter, and voltage-to-current converter.
• A versatile circuit is the instrumentation amplifier. The input resistance is essen-
tially infinite and the amplifier gain can be varied by changing a single resistor
value.
• If a capacitor is included as a feedback element, the output voltage is the integral of
the input voltage. If a capacitor is included as an input element, the output voltage
is the derivative of the input voltage. Nonlinear feedback elements, such as diodes
or transistors, produce nonlinear transfer functions such as a logarithmic function.
• As an application, an electronic thermometer in conjunction with an instrumen-
tation amplifier was designed to yield a given amplification.
CHECKPOINT
After studying this chapter, the reader should have the ability to:
✓ Describe the characteristics of an ideal op-amp.
✓ Analyze various op-amp circuits using the ideal op-amp model.
✓ Analyze various op-amp circuits, taking into account the finite gain of the op-amp.
–
+
–
+
Instrumentation
amplifier
R
REF
R
4
V
+
R
3
R
V
O
V
O1
V
O2
V
AT
R
5 R
3.60 V
+
+
–
–
A = –129.55
Figure 9.49 The output voltage
V
AT
applied to an instrumentation amplifier, an offset
voltage generated by a Zener diode and a noninverting amplifier, and the final output
voltage obtained from a summing amplifier
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Chapter 9 Ideal Operational Amplifiers and Op-Amp Circuits 669
✓ Understand and describe the characteristics and operation of various op-amp cir-
cuits, such as the summing amplifier, difference amplifier, and instrumentation
amplifier.
✓ Design various op-amp circuits to perform specific functions using the ideal
op-amp model.
✓ Analyze and design op-amp circuits using nonlinear feedback elements.
REVIEW QUESTIONS
1. Describe the ideal op-amp model and describe the implications of this ideal
model in terms of input currents and voltages.
2. Describe the op-amp model including the effect of a finite op-amp voltage gain.
3. Describe the operation and characteristics of the ideal inverting amplifier.
4. What is the concept of virtual ground?
5. What is the significance of a zero output resistance?
6. When a finite op-amp gain is taken into account, is the magnitude of the result-
ing amplifier voltage gain less than or greater than the ideal value?
7. Describe the operation and characteristics of the ideal summing amplifier.
8. Describe the operation and characteristics of the ideal noninverting amplifier.
9. Describe the voltage follower. What are the advantages of using this circuit.
10. What is the input resistance of an ideal current-to-voltage converter?
11. Describe the operation and characteristics of a difference amplifier.
12. Describe the operation and characteristics of an instrumentation amplifier.
13. Describe the operation and characteristics of an op-amp circuit using a capacitor
as a feedback element.
14. Describe the operation and characteristics of an op-amp circuit using a diode as
a feedback element.
PROBLEMS
Section 9.1 The Operational Amplifier
9.1 Assume an op-amp is ideal, except for having a finite open-loop differential
gain. Measurements were made with the op-amp in the open-loop mode.
Determine the open-loop gain and complete the following table, which
shows the results of those measurements.
9.2 The op-amp in the circuit shown in Figure P9.2 is ideal except it has a finite
open-loop gain. (a) If
A
od
= 10
4
and
v
O
=−2
V, determine
v
I
. (b) If
v
I
= 2
V and
v
O
= 1
V, determine
A
od
.
9.3 An op-amp is in an open-loop configuration as shown in Figure 9.2.
(a) If
v
1
= 2.0010
V,
v
2
= 2.000
V, and
A
od
= 5 ×10
3
, determine
v
O
.
v
1
v
2
v
O
−1mV +1mV
1 V
+1mV
1 V
1 V 5 V
−1V −1V
−0.5V −3V
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670 Part 2 Analog Electronics
(b) If
v
2
= 3.0025
V,
v
O
=−3.00
V, and
A
od
= 2 ×10
4
, what is
v
1
? (c) If
v
1
=−0.01
mV,
v
2
=+0.01
mV, and
v
O
= 1.80
V, determine
A
od
.
9.4 Consider the equivalent circuit of the op-amp shown in Figure 9.7(a). As-
sume terminal
v
1
is grounded and the input to terminal
v
2
is from a trans-
ducer that can be represented by a 0.8 mV voltage source in series with a
25 k
resistance. What is the minimum input resistance
R
i
such that the
minimum differential input voltage is
v
id
= 0.790 mV
?
Section 9.2 Inverting Amplifier
9.5 Consider the ideal inverting op-amp circuit shown in Figure 9.8. Deter-
mine the voltage gain
A
v
= v
O
/v
I
for (a)
R
2
= 200
k
,
R
1
= 20
k
;
(b)
R
2
= 120
k
,
R
1
= 40
k
; and (c)
R
2
= 40
k
,
R
1
= 40
k
.
9.6 Assume the op-amps in Figure P9.6 are ideal. Find the voltage gain
A
v
= v
O
/v
I
and the input resistance
R
i
of each circuit.
(a)
(c)
(b)
(d)
–
+
200 kΩ
20 kΩ
20 kΩ
v
O
v
I
–
+
200 kΩ
20 kΩ
20 kΩ
v
O
v
I
–
+
200 kΩ
20 kΩ
v
O
v
I
–
+
200 kΩ
20 kΩ
20 kΩ
v
O
v
I
Figure P9.6
–
+
2 MΩ
1 kΩ
v
O
v
I
Figure P9.2
9.7 Consider an ideal inverting op-amp with
R
2
= 100 k
and
R
1
= 10 k
.
(a) Determine the ideal voltage gain and input resistance
R
i
. (b) Repeat
part (a) for a second
100 k
resistor connected in parallel with
R
2
. (c) Repeat
part (a) for a second
10 k
resistance connected in series with
R
1
.
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Chapter 9 Ideal Operational Amplifiers and Op-Amp Circuits 671
D9.8 (a) Design an inverting op-amp circuit with a closed-loop voltage gain of
A
v
= v
O
/v
I
=−12
. The current in each resistor is to be no larger than
20 μ
A when the output voltage is
−4.0
V. (b) Using the results of part (a),
determine
v
I
and the current in each resistor when
v
O
=+1.5
V.
9.9 Consider an ideal op-amp used in an inverting configuration as shown in
Figure 9.8. Determine the closed-loop voltage gain for the following resis-
tor values.
(a)
R
1
= 20 k
,
R
2
= 200 k
(b)
R
1
= 20 k
,
R
2
= 20 k
(c)
R
1
= 20 k
,
R
2
= 4k
(d)
R
1
= 50 k
,
R
2
= 500 k
(e)
R
1
= 50 k
,
R
2
= 100 k
(f)
R
1
= 50 k
,
R
2
= 50 k
9.10 Consider the inverting amplifier shown in Figure 9.8. Assume the op-amp is
ideal. Determine the resistor values
R
1
and
R
2
to produce a closed-loop
voltage gain of (a)
−3.0
, (b)
−8.0
, (c)
−20
, and (d)
−0.50
. In each case the
largest resistor is to be limited to 200 k
.
D9.11 (a) Design an inverting op-amp circuit with a closed-loop voltage gain of
A
v
=−6.5
. When in the input voltage is
v
I
=−0.25
V, the magnitude of the
currents is to be
50 μ
A. Determine
R
1
and
R
2
. (b) Using the results of part
(a), find
v
I
,
i
1
, and
i
2
when
v
O
=−4.0
V.
D9.12 (a) Design an inverting op-amp circuit such that the closed-loop voltage
gain is
A
v
=−20
and the smallest resistor value is
25
k
. (b) Repeat part
(a) for the case when the largest resistor value is 1 M
. (c) Determine
i
1
in
both parts (a) and (b) when the input voltage is
v
I
=−0.20
V.
9.13 (a) In an inverting op-amp circuit, the nominal resistance values are
R
2
= 300 k
and
R
1
= 15 k
. The tolerance of each resistor is
±5%
,
which means that each resistance can deviate from its nominal value by
±5%
. What is the maximum deviation in the voltage gain from its nominal
value? (b) Repeat part (a) if the resistor tolerance is reduced to
±1%
.
9.14 (a) The input to the circuit shown in Figure P9.14 is
v
I
=−0.20
V. (i) What
is
v
O
? (ii) Determine
i
2
,
i
O
, and
i
L
. (b) Repeat part (a) for
v
I
=+0.05
V.
(c) Repeat part (a) for
v
I
= 8 sin ωt
mV.
+
–
i
O
i
2
v
I
R
L
= 4 kΩ
R
2
= 15 kΩ
R
1
= 1 kΩ
i
L
v
O
Figure P9.14
D9.15 Design an inverting amplifier to provide a nominal closed-loop voltage gain
of
A
v
=−30
. The maximum input voltage signal is 25 mV with a source
resistance in the range
1k ≤ R
S
≤ 2k
. The variable source resistance
should introduce no more than a 5 percent difference in the gain factor.
What is the range in output voltage?
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672 Part 2 Analog Electronics
9.16 The parameters of the two inverting op-amp circuits connected in cascade
in Figure P9.16 are
R
1
= 10
k
,
R
2
= 80
k
,
R
3
= 20
k
, and
R
4
= 100
k
. For
v
I
=−0.15
V, determine
v
O1
, v
O
,
i
1
,
i
2
,
i
3
, and
i
4
. Also
determine the current into or out of the output terminal of each op-amp.
9.20 The inverting op-amp shown in Figure 9.9 has parameters
R
1
= 25 k
,
R
2
= 100 k
, and
A
od
= 5 ×10
3
. The input voltage is from an ideal volt-
age source whose value is
v
I
= 1.0000 V
. (a) Calculate the closed-loop
voltage gain. (b) Determine the actual output voltage. (c) What is the per-
centage difference between the actual output voltage and the ideal output
voltage. (d) What is the voltage at the inverting terminal of the op-amp?
9.21 (a) An op-amp with an open-loop gain of
A
od
= 7 ×10
3
is to be used in an
inverting op-amp circuit. Let
R
2
= 100
k
and
R
1
= 10
k
. If the output
voltage is
v
O
= 7
V, determine the input voltage and the voltage at the in-
verting terminal of the op-amp. (b) If the output voltage is
v
O
=−5
V and
v
O1
v
O
i
4
i
3
R
1
R
2
R
3
R
4
v
I
i
2
i
1
+
–
+
–
Figure P9.16
+
–
v
I
R
2
= 22 kΩ
R
1
= 1 kΩ
v
O
Figure P9.19
D9.17 Design the cascade inverting op-amp circuit in Figure P9.16 such that the
overall closed-loop voltage gain is
A
v
= v
O
/v
I
= 100
and such that the
maximum current in any resistor is limited to
50 μ
A when
υ
I
= 50
mV, but
under the condition that the minimum resistance is 10 k
.
D9.18 Design an amplifier system with three inverting op-amps circuits in cascade
such that the overall closed-loop voltage gain is
A
v
= v
O
/v
I
=−300
. The
maximum resistance is limited to 200 k
and the minimum resistance is
limited to 20 k
. In addition, the maximum current in any resistor is to be
limited to
60 μ
A when
v
O
= 6
V.
9.19 Consider the circuit shown in Figure P9.19. (a) Determine the ideal output
voltage
v
O
if
v
I
=−0.40
V. (b) Determine the actual output voltage if the
open-loop gain of the op-amp is
A
od
= 5 ×10
3
. (c) Determine the required
value of
A
od
in order that the actual voltage gain be within 0.2 percent of the
ideal value.
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Chapter 9 Ideal Operational Amplifiers and Op-Amp Circuits 673
the voltage at the inverting terminal of the op-amp is 0.2 mV, what is the
input voltage and the value of
A
od
?
9.22 (a) For the ideal inverting op-amp circuit with T-network, shown in Figure
9.12, the circuit parameters are
R
1
= 10
k
,
R
2
= R
3
= 50
k
, and
R
4
= 5
k
. Determine the closed-loop voltage gain. (b) Determine a new
value of
R
4
to produce a voltage gain of (i)
A
v
=−100
and (ii)
A
v
=−150
.
D9.23 Consider the ideal inverting op-amp circuit with T-network in Figure 9.12.
(a) Design the circuit such that the input resistance is
500 k
and the gain is
A
v
=−80
. Do not use resistor values greater than
500 k
. (b) For the de-
sign in part (a), determine the current in each resistor if
v
I
=−0.05 V
.
9.24 An ideal inverting op-amp circuit is to be designed with a closed-loop volt-
age gain of
A
v
=−1000
. The largest resistor value to be used is
500 k
.
(a) If the simple two-resistor design shown in Figure 9.8 is used, what is the
input resistance? (b) If the T-network design shown in Figure 9.12 with
R
3
= 500 k
and
R
2
= R
4
= 250 k
is used, what is the input resistance?
9.25 For the op-amp circuit shown in Figure P9.25, determine the gain
A
v
= v
O
/v
I
. Compare this result to the gain of the circuit shown in Fig-
ure 9.12, assuming all resistor values are equal.
9.26 The inverting op-amp circuit in Figure 9.9 has parameters
R
1
= 20
k
,
R
2
= 200
k
, and
A
od
= 5 ×10
4
. The output voltage is
v
O
=−4.80
V.
(a) Determine the closed-loop voltage gain. (b) Find the input voltage.
(c) Determine the voltage at the inverting terminal of the op-amp. (d) Using
v
I
from part (b), find the percent error in output voltage compared to the
ideal value.
9.27 (a) Consider the op-amp circuit in Figure P9.27. The open-loop gain of
the op-amp is
A
od
= 2.5 ×10
3
. (i) Determine
v
O
when
v
I
=−0.80
V.
(ii) What is the percent error in output voltage compared to the ideal
value? (b) Repeat part (a) for
A
od
= 200
.
R
RR R
RR
v
O
v
I
+
–
Figure P9.25
100 kΩ
100 kΩ
v
O
v
I
+
–
Figure P9.27
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674 Part 2 Analog Electronics
*9.28 The circuit in Figure P9.28 is similar to the inverting amplifier except the
resistor
R
3
has been added. (a) Derive the expression for
v
O
in terms of
v
I
and the resistors. (b) Derive the expression for
i
3
in terms of
v
I
and the
resistors.
*D9.29 Design the amplifier in Figure P9.29 such that the output voltage varies be-
tween
±10 V
as the wiper arm of the potentiometer changes from
−10 V
to
+10 V
. What is the purpose of including
R
3
and
R
4
instead of connecting
R
1
directly to the wiper arm?
Section 9.3 Summing Amplifier
9.30 Consider the ideal inverting summing amplifier in Figure 9.14(a) with
parameters
R
1
= 40
k
,
R
2
= 20
k
,
R
3
= 60
k
, and
R
F
= 120
k
.
(a) Determine
v
O
for
v
I1
=−0.25
V,
v
I2
=+0.10
V, and
v
I3
=+1.5
V.
(b) Determine
v
I1
for
v
I2
=+0.25
V,
v
I3
=−1.2
V, and
v
O
=+0.50
V.
D9.31 (a) Design an ideal inverting summing amplifier to produce an output volt-
age of
v
O
=−2.5
(
1.2v
I1
+2.5v
I2
+0.25v
I3
)
. Design the circuit to pro-
duce the largest possible input resistance, assuming the largest resistance in
the circuit is limited to 400 k
. (b) Using the results of part (a), determine
the current in the feedback resistor for
v
I1
=−1.0
V,
v
I2
=+0.25
V, and
v
I3
=+2
V.
D9.32 Design an ideal inverting summing amplifier to produce an output voltage
of
v
O
=−2
(
v
I1
+3v
I2
)
.
The input voltages are limited to the ranges of
−1 ≤ v
I1
≤+1
V and
−0.5 ≤ v
I2
≤+0.2
V. The current in any resistor is
to be limited to a maximum of
80 μ
A.
9.33 Consider the summing amplifier in Figure 9.14 with
R
F
= 10 k
,
R
1
= 1k
,
R
2
= 5k
, and
R
3
= 10 k
. If
v
I1
is a 1 kHz sine wave with
an rms value of 50 mV, if
v
I2
is a 100 Hz square wave with an amplitude of
±1V
, and if
v
I3
= 0
, sketch the output voltage
v
O
.
9.34 The parameters for the summing amplifier in Figure 9.14 are
R
F
= 100
k
and
R
3
=∞
. The two input voltages are
v
I1
= 4 +125 sin ωt
mV and
v
I2
=−6
mV. Determine
R
1
and
R
2
to produce an output voltage of
v
O
=−0.5 sin ω t
V.
D9.35 (a) Design an ideal summing op-amp circuit to provide an output voltage of
v
O
=−2
[
(
v
I1
/4
)
+2v
I2
+v
I3
]
. The largest resistor value is to be 250 k
.
(b) Using the results of part (a), determine the range in output voltage and
+
–
i
3
v
I
R
L
R
1
R
2
R
3
v
O
Figure P9.28
+
–
+10 V
–10 V
50 kΩ
Potentiometer
R
1
= 1 kΩ
R
2
R
3
= 100 Ω
R
4
= 10 kΩ
v
O
Figure P9.29
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Chapter 9 Ideal Operational Amplifiers and Op-Amp Circuits 675
the maximum current in
R
F
if the input voltages are in the ranges
−2 ≤ v
I1
≤+2
V,
0 ≤ v
I2
≤ 0.5
V, and
−1 ≤ v
I3
≤ 0
V.
D9.36 An ideal three-input inverting summing amplifier is to be designed. The input
voltages are
v
I1
= 2 +2 sin ωt
V,
v
I2
= 0.5 sin ω t
V, and
v
I3
=−4
V. The
desired output voltage is
v
O
=−6 sin ω t
V. The maximum current in any
resistor is to be limited to
120 μ
A.
9.37 A summing amplifier can be used as a digital-to-analog converter (DAC).
An example of a 4-bit DAC is shown in Figure P9.37. When switch
S
3
is
connected to the
−5V
supply, the most significant bit is
a
3
= 1
; when
S
3
is
connected to ground, the most significant bit is
a
3
= 0
. The same condition
applies to the other switches
S
2
,
S
1
, and
S
o
, corresponding to bits
a
2
,
a
1
, and
a
o
, where
a
o
is the least significant bit. (a) Show that the output voltage is
given by
v
O
=
R
F
10
a
3
2
+
a
2
4
+
a
1
8
+
a
o
16
(5)
where
R
F
is in
k
. (b) Find the value of
R
F
such that
v
O
= 2.5V
when the
digital input is
a
3
a
2
a
1
a
o
= 1000
. (c) Using the results of part (b), find
v
o
for: (i)
a
3
a
2
a
1
a
o
= 0001
, and (ii)
a
3
a
2
a
1
a
o
= 1111
.
9.38 Consider the circuit in Figure P9.38. (a) Derive the expression for the out-
put voltage
v
O
in terms of
v
I1
and v
I2
. (b) Determine
v
O
for
v
I1
=+5
mV
and
v
I2
=−25 − 50 sin ωt
mV. (c) Determine the peak currents in the 10 k
and 20 k
resistors.
*9.39 Consider the summing amplifier in Figure 9.14 (a). Assume the op-amp has
a finite open-loop differential gain
A
od
. Using the principle of superposi-
tion, show that the output voltage is given by
v
O
=
−1
1 +
(
1 + R
F
/R
P
)
A
od
R
F
R
1
v
I1
+
R
F
R
2
v
I2
+
R
F
R
3
v
I3
where
R
P
= R
1
R
2
R
3
. Demonstrate how the expression will change if
more or fewer inputs are included.
V
R
= –5 V
R
F
R
3
= 20 kΩ
R
2
= 40 kΩ
R
1
= 80 kΩ
R
o
= 160 kΩ
S
3
S
2
S
1
S
o
v
O
+
–
Figure P9.37
+
+
–
–
v
I1
v
I2
1 kΩ
1 kΩ
1 kΩ
10 kΩ
20 kΩ
v
O
Figure P9.38
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676 Part 2 Analog Electronics
Section 9.4 Noninverting Amplifier
9.40 Consider the ideal noninverting op-amp circuit in Figure 9.15. Determine
the closed-loop gain for the following circuit parameters: (a)
R
1
= 15
k
,
R
2
= 150
k
; (b)
R
1
= 50
k
,
R
2
= 150
k
; (c)
R
1
= 50
k
,
R
2
= 20
k
;
and (d)
R
1
= 20
k
,
R
2
= 20
k
.
D9.41 (a) Design an ideal noninverting op-amp circuit with the configuration
shown in Figure 9.15 to have a closed-loop gain of
A
v
= 15
. When
v
O
=−7.5
V, the current in any resistor is to be limited to a maximum
value of
120 μ
A. (b) Using the results of part (a), determine the output volt-
age
v
O
and the currents in the resistors for
v
I
= 0.25
V.
9.42 Consider the noninverting amplifier in Figure 9.15. Assume the op-amp is
ideal. Determine the resistor values
R
1
and
R
2
to produce a closed-loop
gain of (a) 3, (b) 9, (c) 30, and (d) 1.0. The maximum resistor value is to be
limited to 290 k
.
9.43 For the circuit in Figure P9.43, the input voltage is
v
I
= 5V
. (a) If
v
O
= 2.5V
, determine the finite open-loop differential gain of the op-amp.
(b) If the open-loop differential gain of the op-amp is 5000, determine
v
O
.
500 kΩ
1 kΩ
v
O
v
I
+
–
Figure P9.43
50 kΩ
50 kΩ
40 kΩ
20 kΩ
v
O
v
I1
v
I2
+
–
Figure P9.44
9.44 Determine
v
O
as a function of
v
I1
and
v
I2
for the ideal noninverting op-amp
circuit in Figure P9.44.
9.45 Consider the ideal noninverting op-amp circuit in Figure P9.45. (a) Derive
the expression for
v
O
as a function of
v
I1
and
v
I2
. (b) Find
v
O
for
v
I1
= 0.2V
and
v
I2
= 0.3V
. (c) Find
v
O
for
v
I1
=+0.25 V
and
v
I2
=
−0.40 V
.
50 kΩ
100 kΩ
10 kΩ
40 kΩ
20 kΩ
v
O
v
I1
v
I2
+
–
Figure P9.45
+
–
v
O
R
1
R
2
R
3
R
4
v
I
Figure P9.46
9.46 (a) Derive the expression for the closed-loop voltage gain
A
v
= v
O
/v
I
for
the circuit shown in Figure P9.46. Assume an ideal op-amp. (b) Let
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Chapter 9 Ideal Operational Amplifiers and Op-Amp Circuits 677
R
4
= 50
k
and
R
3
= 25
k
. Determine
R
1
and
R
2
such that
A
v
= 6
,as-
suming the maximum resistor value is limited to 200 k
.
9.47 The circuit shown in Figure P9.47 can be used as a variable noninverting
amplifier. The circuit uses a
50 k
potentiometer in conjunction with an
ideal op-amp. (a) Derive the expression for the closed-loop voltage gain
v
O
/v
I
in terms of the potentiometer setting x. (b) What is the range of
closed-loop voltage gain? (c) Is there a potential problem with this circuit?
If so, what is the problem?
9.49 For the amplifier in Figure P9.49, determine (a) the ideal closed-loop volt-
age gain, (b) the actual closed-loop voltage gain if the open-loop gain is
A
od
= 150,000,
and (c) the open-loop gain such that the actual closed-loop
gain is within 1 percent of the ideal.
9.50 Consider the voltage-follower circuit in Figure 9.17. Determine the
closed-loop voltage gain if the op-amp open-loop voltage gain
A
od
is (a) 20,
(b) 200, (c)
2 × 10
3
, and (d)
2 × 10
4
.
9.51 (a) Consider the ideal op-amp circuit shown in Figure P9.51. Determine the
voltage gains
A
v1
= v
O1
/v
I
and
A
v2
= v
O2
/v
I
. What is the relationship
between
v
O1
and
v
O2
? (b) For
R
2
= 60
k
,
R
1
= 20
k
, and
R = 50
k
,
determine
v
O1
and
v
O2
for
v
I
=−0.50
V. (c) Determine
(
v
O1
−v
O2
)
for
v
I
=+0.8
V.
–
+
v
O
v
I
1– x
x
50 kΩ potentiometer
Figure P9.47
R
R
–
+
2R
2R
+
–
v
O
v
I
Figure P9.48
–
+
+
–
R
L
= 1 kΩ
R
S
= 50 kΩ
v
O
v
I
i
i
i
L
Figure P9.49
9.48 (a) Determine the closed-loop voltage gain
A
v
= v
O
/v
I
for the ideal op-
amp circuit in Figure P9.48. (b) Determine
v
O
for
v
I
= 0.25
V. (c) Let
R = 30
k
. For
v
I
=−0.15
V, determine the current in the resistor
R
in the
T-network.
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