Neamen D. Microelectronics: Circuit Analysis and Design

Подождите немного. Документ загружается.

778 Part 2 Analog Electronics

Writing a KVL equation around the B–E loop, we have

+ V

π2

+ g

π2

= 0

(11.57)

which yields

π2

−(V

/2)

1 + g

(11.58)

Substituting Equation (11.58) into (11.56), we ﬁnd the differential-mode voltage

gain as

2(1 + g

)

(11.59)

EXAMPLE 11.7

Objective: Determine the one-sided differential-mode voltage gain of the circuit

shown in Figure 11.15.

Assume

= 0.5

mA,

β = 100

, and

= 10



. Find the differential-mode

voltage gain for (a)

= 0

and (b)

= 500 

Solution: The small-signal transconductance is found to be

= 9.62

mA/V. We

ﬁnd the differential-mode voltage gain to be (a) for

= 0

(9.62)(10)

= 48.1

and (b) for

= 500 

2(1 + g

)

(9.62)(10)

2[1 + (9.62)(0.5)]

= 8.28

Comment: As with any design problem, there are trade-offs. Including an emitter re-

sistor R

decreases the voltage gain but increases the input differential-mode resistance.

EXERCISE PROBLEM

Ex 11.7: Consider the diff-amp described in Example 11.7. Assume the same

parameters except the value of R

. Determine the value of R

that results in a

differential-mode voltage gain of

= 10

. What is the corresponding value of

differential-input resistance? (Ans.

= 0.396 k

= 100.8k

)

Test Your Understanding

TYU 11.4 Consider the effect of a mismatch in collector resistors. Assume that

= 3.86

mA/V

= 100 k

, and a nominal collector resistor of

= 10 k

Determine the minimum mismatch in the collector resistor

R

such that the common-

mode rejection ratio is 75 dB. (Ans.

R

= 0.686 k

)

TYU 11.5 Consider the effect of a mismatch in the transconductance of the transistors.

Assume

= 100 k

and the nominal transconductance is

= 3.86

mA/V. Deter-

mine the minimum mismatch in the transconductance

g

such that the common-

mode rejection ratio is 90 dB. (Ans.

g

= 0.0472

mA/V or

g

→ 1.22%

)

nea80644_ch11_753-850.qxd 6/19/09 4:37 AM Page 778 pmath DATA-DISK:Desktop Folder:18.6.09:MHDQ134-11:

Chapter 11 Differential and Multistage Ampliﬁers 779

TYU 11.6 The parameters of the diff-amp shown in Figure 11.2 are

= 5

−

=−5

= 0.4

mA, and

= 10



. The output resistance of the constant-

current source is

= 100



. The transistor parameters are

β = 150

(

)

= 0.7

V, and

=∞

. (a) Determine the dc input base currents. (b) Deter-

mine the differential signal input currents if a differential-mode input voltage

= 10 sin ω t

mV is applied. (c) If a common-mode input voltage

= 3 sin ωt

is applied, determine the common-mode signal input base currents. (Ans. (a)

= 1.32 μ

A, (b)

= 0.256 sin ωt μ

A, (c)

= 0.0993 sin ωt μ

11.3 BASIC FET DIFFERENTIAL PAIR

Objective: • Describe the characteristics of and analyze the basic

FET differential ampliﬁer.

In this section, we will evaluate the basic FET differential ampliﬁer, concentrating on

the MOSFET diff-amp. As we did for the bipolar diff-amp, we will develop the dc

transfer characteristics, and determine the differential- and common-mode gains.

Differential ampliﬁers using JFETs are also available. Since the analysis is almost

identical to that for the MOSFET diff-amp, we will only brieﬂy consider the JFET dif-

ferential pair. A few of the problems at the end of this chapter are based on these circuits.

DC Transfer Characteristics

Figure 11.19 shows the basic MOSFET differential pair, with matched transistors M

and M

biased with a constant current I

. We assume that M

and M

are always

biased in the saturation region.

Like the basic bipolar conﬁguration, the basic MOSFET diff-amp uses both

positive and negative bias voltages, thereby eliminating the need for coupling capacitors

and voltage divider biasing resistors at the gate terminals. Even with

= v

= 0

the transistors M

and M

can be biased in the saturation region by the current source I

This circuit, then, is also a dc-coupled diff-amp.

11.3.1

–

––

GS2

GS1

Figure 11.19 Basic MOSFET differential pair conﬁguration

nea80644_ch11_753-850.qxd 6/19/09 4:37 AM Page 779 pmath DATA-DISK:Desktop Folder:18.6.09:MHDQ134-11:

780 Part 2 Analog Electronics

EXAMPLE 11.8

Objective: Calculate the dc characteristics of a MOSFET diff-amp.

Consider the differential ampliﬁer shown in Figure 11.20. The transistor parameters

are:

= K

= 0.1

mA/V

= K

= 0.3

mA/V

, and for all transistors,

λ = 0

and

= 1

V. Determine the maximum range of common-mode input voltage.

–

= –10 V

= 10 V

16 kΩ

30 kΩ

GS4

–

Figure 11.20 MOSFET differential ampliﬁer for Example 11.8

Solution:

The reference current can be determined from

20 − V

GS4

and from

= K

GS4

− V

)

Combining these two equations and substituting the parameter values, we obtain

GS4

−17V

GS4

−11 = 0

which yields

GS4

= 2.40 V and I

= 0.587 mA

Since M

and M

are identical, we also ﬁnd

= 0.587 mA

The quiescent drain currents in M

and M

are

= I

∼

0.293 mA

The gate-to-source voltages are then

GS1

= V

GS2



+ V



0.293

0.1

+1 = 2.71 V

nea80644_ch11_753-850.qxd 6/19/09 4:37 AM Page 780 pmath DATA-DISK:Desktop Folder:18.6.09:MHDQ134-11:

Chapter 11 Differential and Multistage Ampliﬁers 781

The quiescent values of

and

are

= v

= 10 − I

= 10 −(0.293)(16) = 5.31 V

The maximum common-mode input voltage is the value when M

and M

reach

the transition point, or

DS1

= V

DS2

= V

DS1

(sat) = V

GS1

− V

= 2.71 −1 = 1.71 V

Therefore,

(max) = v

− V

DS1

(sat) + V

GS1

= 5.31 −1.71 +2.71

(max) = 6.31 V

The minimum common-mode input voltage is the value when M

reaches the

transition point, or

DS4

= V

DS4

(sat) = V

GS4

− V

= 2.4 −1 = 1.4V

Therefore,

(min) = V

GS1

+ V

DS4

(sat) − 10 = 2.71 +1.4 −10

(min) =−5.89 V

Comment: For this circuit the maximum range for the common-mode input voltage

−5.89 ≤ v

≤ 6.31 V

EXERCISE PROBLEM

*Ex 11.8: For the differential ampliﬁer in Figure 11.20, the parameters are:

= 5

−

=−5

= 80 k

, and

= 40



. The transistor parameters

are

λ = 0

and

= 0.8

V for all transistors, and

= K

= 100 μA/V

and

= K

= 50 μA/V

. Determine the range of the common-mode input volt-

age. (Ans.

−2.18 ≤ v

≤ 3.76 V

)

The dc transfer characteristics of the MOSFET differential pair can be deter-

mined from the circuit in Figure 11.19. Neglecting the output resistances of M

and

, and assuming the two transistors are matched, we can write

= K

GS1

− V

)

(11.60(a))

and

= K

GS2

− V

)

(11.60(b))

Taking the square roots of Equations (11.60(a)) and (11.60(b)), and subtracting the

two equations, we obtain



−



GS1

−v

GS2

) =



· v

(11.61)

where

= v

−v

= v

GS1

−v

GS2

is the differential-mode input voltage. If

> 0

, then

and

GS1

GS2

, which implies that

> i

. Since

= I

(11.62)

nea80644_ch11_753-850.qxd 6/19/09 4:37 AM Page 781 pmath DATA-DISK:Desktop Folder:18.6.09:MHDQ134-11:

782 Part 2 Analog Electronics

then Equation (11.61) becomes





−



−i







· v



= K

(11.63)

when both sides of the equation are squared. After the terms are rearranged, Equa-

tion (11.63) becomes



−i

) =



− K



(11.64)

If we square both sides of this equation, we develop the quadratic equation

− I



− K



= 0

(11.65)

Applying the quadratic formula, rearranging terms, and noting that

> I

and

> 0

, we obtain



· v



1 −





(11.66)

Using Equation (11.62), we ﬁnd that

−



· v



1 −





(11.67)

The normalized drain currents are



· v



1 −





(11.68)

and

−



· v



1 −





(11.69)

These equations describe the dc transfer characteristics for this circuit. They are

plotted in Figure 11.21 as a function of a normalized differential input voltage



(2I

)

–0.6 –0.4 –0.2 0 0.2 0.4 0.6

0.5

1.0

′

Figure 11.21 Normalized dc transfer characteristics,

MOSFET differential ampliﬁer

nea80644_ch11_753-850.qxd 6/19/09 4:37 AM Page 782 pmath DATA-DISK:Desktop Folder:18.6.09:MHDQ134-11:

Chapter 11 Differential and Multistage Ampliﬁers 783

We can see from Equations (11.68) and (11.69) that, at a speciﬁc differential

input voltage, bias current I

is switched entirely to one transistor or the other. This

occurs when

max



(11.70)

The forward transconductance is deﬁned as the slope of the i

versus

transfer

characteristic evaluated at

= 0

, or

(max) =



(11.71)

Using Equation (11.66), we ﬁnd that

(max) =



(11.72)

where g

is the transconductance of each transistor. The slope of the i

characteris-

tic curve at

= 0

is the same, except it is negative.

We can perform an analysis similar to that in Example 11.2 to determine the

maximum differential-mode input signal that can be applied and still maintain

linearity. If we let

= 1

mA and

= 1

mA/V

, then for differential input voltages

less than 0.34 V, the difference between the linear approximation and the actual curve

is less than 1 percent. The maximum differential input signal for the MOSFET diff-

amp is much larger than for the bipolar diff-amp. The principal reason is that the gain

of the MOSFET diff-amp, as we will see, is much smaller than the gain of the bipo-

lar diff-amp.

Figure 11.22 is the ac equivalent circuit of the diff-amp conﬁguration, showing

only the differential voltage and signal currents as a function of the transistor

transconductance g

. We assume that the output resistance looking into the current

source is inﬁnite. Using this equivalent circuit, we ﬁnd the one-sided output voltage

at v

, as follows:

≡ v





(11.73)

–

Signal

ground

Figure 11.22 AC equivalent circuit,

MOSFET differential ampliﬁer

nea80644_ch11_753-850.qxd 6/19/09 4:37 AM Page 783 pmath DATA-DISK:Desktop Folder:18.6.09:MHDQ134-11:

784 Part 2 Analog Electronics

The differential voltage gain is then



· R

(11.74)

Differential- and Common-Mode Input Impedances

At low frequencies, the input impedance of a MOSFET is essentially inﬁnite, which

means that both the differential- and common-mode input resistances of a MOSFET

diff-amp are inﬁnite. Also, we know that the differential input resistance of a bipolar

pair can be in the low kilohm range. A design trade-off, then, would be to use a

MOSFET diff-amp with inﬁnite input resistance, and sacriﬁce the differential-mode

voltage gain.

Small-Signal Equivalent Circuit Analysis

We can determine the basic relationships for the differential-mode gain, common-

mode gain, and common-mode rejection ratio from an analysis of the small-signal

equivalent circuit.

Figure 11.23 shows the small-signal equivalent circuit of the MOSFET differ-

ential pair conﬁguration. We assume the transistors are matched, with

λ = 0

for each

transistor, and that the constant-current source is represented by a ﬁnite output

resistance R

. All voltages are represented by their phasor components. The two tran-

sistors are biased at the same quiescent current, and

= g

≡ g

11.3.3

11.3.2

= V

gs2

gs1

gs2

–

Figure 11.23 Small-signal equivalent circuit, MOSFET differential ampliﬁer

Writing a KCL equation at node V

, we have

gs1

+ g

gs2

(11.75)

From the circuit, we see that

gs1

= V

− V

and

gs2

= V

− V

. Equation (11.75)

then becomes

+ V

−2V

) =

(11.76)

nea80644_ch11_753-850.qxd 6/19/09 4:37 AM Page 784 pmath DATA-DISK:Desktop Folder:18.6.09:MHDQ134-11:

Chapter 11 Differential and Multistage Ampliﬁers 785

Solving for V

we obtain

+ V

2 +

(11.77)

For a one-sided output at the drain of M

, we have

= V

=−(g

gs2

=−(g

)(V

− V

)

(11.78)

Substituting Equation (11.77) into (11.78) and rearranging terms yields

=−g

⎡

⎢

⎣



1 +



− V

2 +

⎤

⎥

⎦

(11.79)

Based on the relationships between the input voltages V

and V

and the

differential- and common-mode voltages, as given by Equation (11.29), Equa-

tion (11.79) can be written

−

1 + 2g

(11.80)

The output voltage, in general form, is

= A

+ A

(11.81)

The transconductance g

of the MOSFET is

= 2



Comparing Equations (11.80) and (11.81), we develop the relationships for the

differential-mode gain,









· R

(11.82(a))

and the common-mode gain

−g

1 + 2g

−



· R

1 + 2



· R

(11.82(b))

We again see that for an ideal current source, the common-mode gain is zero since

=∞

From Equations (11.82(a)) and (11.82(b)), the common-mode rejection ratio,

CMRR

, is found to be

CMRR =



1 + 2



· R



(11.83)

This demonstrates that the CMRR for the MOSFET diff-amp is also a strong func-

tion of the output resistance of the constant-current source.

EXAMPLE 11.9

Objective: Determine the differential-mode voltage gain, common-mode voltage

gain, and CMRR for a MOSFET diff-amp.

Consider a MOSFET diff-amp with the conﬁguration in Figure 11.20. Assume

the same transistor parameters as given in Example 11.8 except assume

λ = 0.01 V

−1

for M

nea80644_ch11_753-850.qxd 6/19/09 4:37 AM Page 785 pmath DATA-DISK:Desktop Folder:18.6.09:MHDQ134-11:

786 Part 2 Analog Electronics

Solution: From Example 11.8, we found the bias current to be

= 0.587

mA. The

output resistance of the current source is then

λI

(0.01)(0.587)

= 170 k

The differential-mode voltage gain is



· R



(1)(0.587)

· (16) = 8.67

and the common-mode voltage gain is

=−



· R

1 + 2



· R

=−

√

2(1)(0.587) · (16)

1 + 2

√

2(1)(0.587) · (170)

=−0.0469

The common-mode rejection ratio is then

CMRR

= 20 log



8.67

0.0469



= 45.3dB

Comment: As mentioned earlier, the differential-mode voltage gain of the MOSFET

diff-amp is considerably less than that of the bipolar diff-amp, since the value of the

MOSFET transconductance is, in general, much smaller than that of the BJT.

EXERCISE PROBLEM

Ex 11.9: The parameters of the circuit shown in Figure 11.19 are

= 3

−

=−3

= 0.2

mA, and

= 15



. Assume

and

are matched

with parameters

= 0.4



= 100 μ

A/V

, and

λ = 0

. (a) Design the width-

to-length ratios of the transistors such that the one-sided differential voltage gain

= 15

. (b) Using the results of part (a), what is the value of

(

max

)

? (Ans.

(a)

W/L = 200

, (b)

(

max

)

= 1.0

mA/V)

The value of the common-mode rejection ratio can be increased by increasing

the output resistance of the current source. An increase in the output resistance can

be accomplished by using a more sophisticated current source circuit. Figure 11.24

REF

–

Figure 11.24 MOSFET cascode current source

nea80644_ch11_753-850.qxd 6/19/09 4:37 AM Page 786 pmath DATA-DISK:Desktop Folder:18.6.09:MHDQ134-11:

Chapter 11 Differential and Multistage Ampliﬁers 787

shows a MOSFET cascode current mirror that was discussed in the last chapter. The

output resistance, as given by Equation (10.57), is

= r

(1 + g

For

the parameters of Example 11.9,

= r

= 170 k

and

= 2



1.53 mA/V

. Then

= 170 +170[1 +(1.53)(170)] ⇒ 44.6M

Again, using the parameters of Example 11.9, the common-mode voltage gain of

the diff-amp with a cascode current mirror would be

=−



· R

1 + 2



· R

=−

√

2(1)(0.587) · (16)

1 + 2

√

2(1)(0.587) · (44600)

=−0.000179

so that the CMRR would be

CMRR

= 20 log



8.67

0.000179



= 93.7dB

We increased the common-mode rejection ratio dramatically by using the cascode

current mirror instead of the single two-transistor current source. Note, however, that

the differential-mode voltage gain is unchanged.

To gain an appreciation of the difference in CMRR between 45.3 dB and

93.7 dB, we can reconsider the linear scale. For a CMRR

= 45.3

dB, the differen-

tial gain is a factor of 185 times larger than the common-mode gain, while for a

CMRR

= 93.7

dB, the differential gain is a factor of 48,436 times larger than the

common-mode gain.

Two-Sided Output

If we consider the two-sided output of an ideal MOSFET op-amp and deﬁne the out-

put voltage as

= V

− V

, we can show that the differential-mode voltage gain

is given by

= g

(11.84(a))

and the common-mode voltage gain is given by

= 0

(11.84(b))

The result of

= 0

for the two-sided output is a consequence of using matched

devices and elements in the diff-amp circuit. We will reconsider a two-sided output

and discuss the effects of mismatched elements in the next section.

Effect of R

Mismatch—Two-Sided Output

We assume that R

and R

are the resistors in the drains of M

and M

. If the two

resistors are not matched, we assume that we can write

= R

+R

and

= R

−R

Using the small-signal equivalent circuit in Figure 11.23, we

can ﬁnd

= g

(11.85(a))

and

∼

R

(11.85(b))

11.3.4

nea80644_ch11_753-850.qxd 6/19/09 4:37 AM Page 787 pmath DATA-DISK:Desktop Folder:18.6.09:MHDQ134-11: